A method for manufacturing a thin film transistor array panel is disclosed. A gate wiring pattern is formed on an insulating substrate. A gate insulating layer is formed on the gate wiring pattern. A semiconductor pattern is formed on the gate insulating layer. A transparent conductive layer is formed on the gate insulating layer. The transparent conductive layer is patterned to form a pixel electrode. An opening is formed at a circumference of the pixel electrode. The opening minimizes misalignment during the manufacturing process and prevents shorts between a data line and the pixel electrode.

A liquid crystal display having electrodes on a single substrate includes a transparent planar electrode elongated in the transverse direction formed on the inner surface of the substrate, and an insulating film is deposited thereon. A plurality of linear electrodes, which are elongated in the longitudinal direction and either transparent or opaque, are formed on the insulating film. When voltages applied, the electric field is symmetrical with respect to the longitudinal central line of the linear electrodes and the longitudinal central line of a region between the linear electrodes, and has parabolic or semi-elliptical lines of force having a center on a boundary line between the planar and the linear electrodes.

A black matrix and a color filter are formed on a substrate, a indium-tin-oxide (ITO) common electrode are deposited thereon and then protrusion pattern made of sensitive material such as photoresist are formed on the common electrode with 3 to 20 micron width. A vertical alignment layer is coated thereon to complete a color filter substrate. After a thin film transistor (TFT) and a passivation film are formed on the other substrate, ITO is deposited on the passivation film and patterned to form a pixel electrode which contains open areas with 3 to 20 micron width. Then, a vertical alignment layer is coated to complete a TFT substrate. Two substrates are assembled in the manner that the apertures and the protrusion patterns are arranged on shifts and liquid crystal having negative dielectric anisotropy is injected between the substrates. Each Polarizer is attached at the outer surfaces of the LCD substrates. Compensation films may be attached between the polarizer and the substrate.

A liquid crystal display includes a first substrate with pixel electrodes, and a second substrate with a common electrode facing the first substrate. The common electrode has depression patterns corresponding to the pixel electrodes. The side wall of each depression pattern is at an angle of 30-120.degree. with respect to the first substrate. The depression patterns of the common electrode are formed through making depression patterns at color filters. In this structure, the liquid crystal display bears wide viewing angle and good picture quality.

A gate wire including a gate line extending in the horizontal direction, and a gate electrode is formed on an insulating substrate. A gate insulating layer is formed on the gate wire and covers the same. A semiconductor pattern is formed on the gate insulating layer 30, and formed on the semiconductor pattern are a data wire having a date line in the vertical direction, a source electrode, a drain electrode separated from the source electrode opposite the source electrode with respect to the gate electrode, and an align pattern located on both sides of the data line. A passivation layer is formed on the data wire and the align pattern, and has contact holes exposing the drain electrode and an opening exposing the substrate between the data line and the align pattern. Here, the align pattern adjacent to the data line is exposed through the opening, and the semiconductor pattern and the gate insulating layer are under-cut. A pixel electrode connected to the drain electrode through the contact hole is formed on the passivation layer. Here, the opening is located between the data line and the pixel electrode. In this structure, misalignment occurring in the manufacturing process of a thin film transistor panel for a liquid crystal display is minimized, and stitch defects are prevented by uniformity forming a coupling capacitance between the data line and the pixel electrode. Shorts between the data line and the pixel electrode are prevented by forming the opening between the data line and the pixel electrode.