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You searched :Patents issued on Jul 04, 2000.

Check out Design Patents for Jul 04, 2000

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USRE36766

Microprocessor breakpoint apparatus - Jul 04, 2000

USRE36765

Method and apparatus for synchronization of atrial defibrillation pulses - Jul 04, 2000

USRE36764

Expandable tip atherectomy method and apparatus - Jul 04, 2000

USRE36763

Apparatus and method for preventing unauthorized copying of video signals - Jul 04, 2000

USRE36762

Protective eyeglasses construction - Jul 04, 2000

USRE36761

Variable transfer rate control coding apparatus - Jul 04, 2000

USRE36760

Method and apparatus for altering material using ion beams - Jul 04, 2000

USRE36759

Inflated dunnage and method for its production - Jul 04, 2000

US6085351

Synchronization method - Jul 04, 2000

US6085350

Single event upset tolerant system and method - Jul 04, 2000

US6085349

Method for selecting cyclic redundancy check polynomials for linear coded systems - Jul 04, 2000

US6085348

Error correction code encoder and decoder - Jul 04, 2000

US6085347

System and method for enhancing modem performance using digital signal processing techniques - Jul 04, 2000

US6085346

Method and apparatus for built-in self test of integrated circuits - Jul 04, 2000

US6085345

Timing control for input/output testability - Jul 04, 2000

US6085344

Data communication interface with memory access controller - Jul 04, 2000

US6085343

Method for concurrent testing of on-chip circuitry and timing counters - Jul 04, 2000

US6085342

Electronic system having a chip integrated power-on reset circuit with glitch sensor - Jul 04, 2000

US6085341

Memory test mode for wordline resistive defects - Jul 04, 2000

US6085340

Method of lattice quantization that minimizes storage requirements and computational complexity - Jul 04, 2000

US6085339

System for memory error handling - Jul 04, 2000

US6085338

CPI infinite and finite analysis - Jul 04, 2000

US6085337

Method and system for reliably indicating test results during a self-check operation - Jul 04, 2000

US6085336

Data processing devices, systems and methods with mode driven stops - Jul 04, 2000

US6085335

Self engineering system for use with a communication system and method of operation therefore - Jul 04, 2000

US6085334

Method and apparatus for testing an integrated memory device - Jul 04, 2000

US6085333

Method and apparatus for synchronization of code in redundant controllers in a swappable environment - Jul 04, 2000

US6085332

Reset design for redundant raid controllers - Jul 04, 2000

US6085331

Setup of the time/date within the CMOS real-time-clock - Jul 04, 2000

US6085330

Control circuit for switching a processor between multiple low power states to allow cache snoops - Jul 04, 2000

US6085329

Portable computer with low power CD-player mode - Jul 04, 2000

US6085328

Wake up of a sleeping computer using I/O snooping and imperfect packet filtering - Jul 04, 2000

US6085327

Area-efficient integrated self-timing power start-up reset circuit with delay of the start-up reset until the system clock is stabilized - Jul 04, 2000

US6085326

Apparatus and method for displaying DPMS mode status using an OSD circuit - Jul 04, 2000

US6085325

Method and apparatus for supporting power conservation operation modes - Jul 04, 2000

US6085324

Monitoring and regulatory system for the internet - Jul 04, 2000

US6085323

Information processing system having function of securely protecting confidential information - Jul 04, 2000

US6085322

Method and apparatus for establishing the authenticity of an electronic document - Jul 04, 2000

US6085321

Unique digital signature - Jul 04, 2000

US6085320

Client/server protocol for proving authenticity - Jul 04, 2000

US6085319

Microcomputer reset apparatus and method - Jul 04, 2000

US6085318

Computer system capable of booting from CD-ROM and tape - Jul 04, 2000

US6085317

Reconfigurable computer architecture using programmable logic devices - Jul 04, 2000

US6085316

Layered counterflow pipeline processor with anticipatory control - Jul 04, 2000

US6085315

Data processing device with loop pipeline - Jul 04, 2000

US6085314

Central processing unit including APX and DSP cores and including selectable APX and DSP execution modes - Jul 04, 2000

US6085313

Computer processor system for executing RXE format floating point instructions - Jul 04, 2000

US6085312

Method and apparatus for handling imprecise exceptions - Jul 04, 2000

US6085311

Instruction alignment unit employing dual instruction queues for high frequency instruction dispatch - Jul 04, 2000

US6085310

Method and apparatus for performing an operation multiple times in response to a single instruction - Jul 04, 2000

red69
created a new post Obviousness Type Double Patenting Analysis

2 hours, 19 minutes ago

Paul
: posted "Please try again. We adjusted the permissions on events." on kwhitman@landon-ip.com's wall

03/16/2010

kwhitman@landon-ip.com
: posted "Hi Paul, Unfortunately when I attempt to delete or edit one of my events via the method you described, the system tells me that I "do not have permission." How can I get around this restriction? Thanks Kristin" on KKyrylyuk
posted a blog US7661445 Offers Better Protection Against Radiation Leakage in X-Ray Machines

03/14/2010

Paul
: posted "Deleting and Event you can perform from your account page. Login and go to My Account. Click on the Events Tab Select the Event you want to delete via the check-box. Then click the Delete Selected box. Hope that helps." on -->