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Jaijiv Prabhakaran

City: Sunnyvale
State/Country: CA US

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Sun Microsystems, Inc. - Santa Clara CA US


Patents
A high-performance band combine function to transform a source image of n bands to a destination image of m bands. A source image vector is multiplied with a transformation matrix having n+1 columns and m rows. The values in the transformation matrix may be user-selected. The product of the source image and the transformation matrix is a destination image vector. The destination image vector may be displayed on a computer monitor. To perform the function in a digital system, the pixels of the source image are converted to a partitioned format. The source image is multiplied with the transformation matrix values using partitioned arithmetic. In the digital system, a plurality of partitioned arithmetic operations may be performed in parallel.
An image processor converts single-band pixel components, each of which represents a single band of a multiple-band pixel, to multiple-band pixels. A embodiment, a single read operation reads four single-band pixel components from each of three buffers which correspond to red, green, and blue bands, respectively, of a multiple-band graphical image. A single merge operation merges eight single-band pixel components representing alpha and green bands of four multiple-band pixels, and a single merge operation merges eight single-band pixel components representing blue and red bands of four multiple-band pixels. Two merge operations merge the respective merged data words to form four multiple-band pixels, each of which includes alpha, blue, green, and red components. The four multiple-band pixels are written to a destination buffer in four write operations.
A high-performance band combine function to transform a source image of n bands to a destination image of m bands. A source image vector is multiplied with a transformation matrix having n+l columns and m rows. The values in the transformation matrix may be user-selected. The product of the source image and the transformation matrix is a destination image vector. The destination image vector may be displayed on a computer monitor. To perform the function in a digital system, the pixels of the source image are converted to a partitioned format. The source image is multiplied with the transformation matrix values using partitioned arithmetic. In the digital system, a plurality of partitioned arithmetic operations may be performed in parallel.
A high-performance band combine function to transform a source image of n bands to a destination image of m bands. A source image vector is multiplied with a transformation matrix having n+1 columns and m rows. The values in the transformation matrix may be user-selected. The product of the source image and the transformation matrix is a destination image vector. The destination image vector may be displayed on a computer monitor. To perform the function in a digital system, the pixels of the source image are converted to a partitioned format. The source image is multiplied with the transformation matrix values using partitioned arithmetic. In the digital system, a plurality of partitioned arithmetic operations may be performed in parallel.
A parallel processor which is capable of partitioned multiplication and partitioned addition operations convolves multiple pixels in parallel. The parallel processor includes a load and store pipeline of a load and store unit which retrieves data from and stores data to memory and one or more arithmetic processing pipelines of an arithmetic processing unit which aligns data and performs partitioned multiplication and partitioned addition operations. A patch of pixels from a source image are convolved substantially simultaneously in the arithmetic processing pipeline of the processor by execution of the partitioned multiplication and partitioned addition operations. At substantially the same time, a subsequent patch of pixels from the source image are read by the load and store unit of the processor. The subsequent patch of the source image is a patch which is aligned with respect to a secondary index and is incremented along a primary index to avoid excessive cache misses when retrieving pixel data for convolution. Reading of pixel data is performed in the load and store pipeline of the processor while the arithmetic processing pipeline substantially simultaneously performs partitioned arithmetic operations on the pixel data to thereby convolve the pixel data.

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