The efficient motion compensation apparatus for digital video format down-conversion with variable conversion ratio is disclosed. The apparatus is characterized by an interpolation and decimation filters derived using a number of orthogonal transforms with variable transform sizes and implemented using efficient computation architectures. The computation architecture comprises the orthogonal transform kernel selection means, frequency component computing means, coefficient weighting means and pixel reconstruction means. A simple architecture for both interpolation and decimation filtering processes has been invented. The result is the dramatic reduction of the shifting and adding/subtracting operations, making them suitable for implementation in LSI realization of the video format down-conversion of digital video systems.
An apparatus and a method for efficient decoding progressive JPEG bitstreams are invented. This invention provides a memory-efficient progressive JPEG decoding method with minimal memory requirements. Instead of storing all the DCT coefficients of at particular decoding scan, a portion of DCT coefficients and the non-zero coefficient indicators for the rest of the DCT coefficients are stored in either original data format or in a compressed format. The memory requirement for decoding progressive JPEG pictures can be minimized according to the resolution of display devices in the real applications.
The invention described herein is an efficient motion compensation apparatus for digital video format down-conversion. This apparatus is characterized by an interpolation and decimation filters implemented using efficient computation architectures. The computation architecture comprises the frequency component computing section, coefficient weighting section and pixel reconstruction section. A simple architecture for both interpolation and decimation filtering processes has been invented. The result is the dramatic reduction of the shifting and adding or subtracting operations, making them suitable for implementation in LSI realization of the video format down-conversion of digital video systems.
The invention described herein is an efficient motion compensation apparatus for digital video format down-conversion. This apparatus is characterized by an interpolation and decimation filters implemented using efficient computation architectures. The computation architecture comprises the frequency component computing section, coefficient weighting section and pixel reconstruction section. A simple architecture for both interpolation and decimation filtering processes has been invented. The result is the dramatic reduction of the shifting and adding or subtracting operations, making them suitable for implementation in LSI realization of the video format down-conversion of digital video systems.
A method and an apparatus for measuring the instantaneous frequency of FM modulated signals, includes sampling, instantaneous frequency computing, and lowpass filtering. FM modulated signal are sampled at prescribed intervals to provide digitized FM signal. The instantaneous frequency is computed by manipulating the digitized FM signal mathematically using a new mathematical equation proposed in this invention to provide the instantaneous frequency based on digitized FM signal samples. More accurate instantaneous frequency values can be obtained by filtering the computed instantaneous frequency values using a lowpass filter.