A trench-gate vertical power transistor in which the trench-gates (11) are parallel stripes which extend across the active area (100). Source regions (13) and ruggedness regions (15) extend to a source contact surface as alternating stripe areas having a width perpendicular to and fully between each two adjacent parallel stripe trench-gates (11). The ruggedness regions (15) are more heavily doped than the source regions and this enables an increased length of the source regions with a consequent reduction in specific resistance of the transistor. For example, the mesa width (13,15) and the trench-gate (11) width may both be about 0.4 .mu.m, the ruggedness region (15) length may be about 1 .mu.m and the source region (13) length may be about 20 .mu.m. The doping concentration of the p type ruggedness regions (15) may be approximately 10 times greater than the doping concentration of the n type regions (13), for example about 10.sub.21 cm.sub.-3 and about 10.sub.20 cm.sub.-3 respectively.