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Semiconductor Energy Laboratory Co., Ltd. -

City: Kanagawa-Ken
JP






Semiconductor Energy Laboratory Co., Ltd.( Kanagawa-Ken )
There is provided a new method of obtaining the dopant activation rate of a device accurately and simply in a different way from a method of obtaining a carrier density with use of a Hall measurement or CV measurement, and also provided a production method of a device performed with a proper threshold voltage control, that is, a dose amount control, according to the obtained activation rate. The inventor devised a method in which the activated dopant density (first dopant density) in a semiconductor film is obtained from the threshold voltage and the flat band voltage of a device, then the dopant activation rate is obtained from the ratio of the obtained activated dopant density to the added dopant density (second dopant density) obtained by SIMS analysis. The invention allows easily obtaining the dopant activation rate in the channel region and the impurity region of the device.
A method for forming a pattern according to the invention comprises the steps of: forming a mask over a substrate having light-transmitting properties; forming a first region having a substance including a light-absorbing material over the substrate and the mask; forming a second region by irradiating the substance with light having a wavelength which is absorbable by the light-absorbing material through the substrate to modify a part of the substance surface; and forming a pattern by discharging a compound including a pattern forming material to the second region.
A plurality of wires and electrodes are formed by forming a first conductive film, selectively forming a resist over the first conductive film, forming a second conductive film over the first conductive film and the resist, removing the second conductive film formed over the resist by removing the resist, forming a third conductive film so as to cover the second conductive film formed over the first conductive film, and selectively etching the first conductive film and the third conductive film. Thus, wires using a low resistance material can be formed in a large-sized panel, and thus, a problem of signal delay can be solved.
US7616273 - Contact structure -  11/10/2009 
There is disclosed a contact structure for electrically connecting conducting lines formed on a first substrate of an electrooptical device such as a liquid crystal display with conducting lines formed on a second substrate via conducting spacers while assuring a uniform cell gap among different cells if the interlayer dielectric film thickness is nonuniform across the cell or among different cells. A first conducting film and a dielectric film are deposited on the first substrate. Openings are formed in the dielectric film. A second conducting film covers the dielectric film left and the openings. The conducting spacers electrically connect the second conducting film over the first substrate with a third conducting film on the second substrate. The cell gap depends only on the size of the spacers, which maintain the cell gap.
In a case of forming a bottom-gate thin film transistor, a step of forming a microcrystalline semiconductor film over a gate insulating film by a plasma CVD method, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film are performed. In the step of forming the microcrystalline semiconductor film, the pressure in the reaction chamber is set at or below 10.sup.-5 Pa once, the substrate temperature is set in the range of 120.degree. C. to 220.degree. C., plasma is generated by introducing hydrogen and a silicon gas, hydrogen plasma is made to act on a reaction product formed on a surface of the gate insulating film to perform removal while performing film formation. Moreover, the plasma is generated by applying a first high-frequency electric power of an HF band a second high-frequency electric power of a VHF band superimposed on each other.