Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 .mu.m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.
By decreasing the threshold voltage shift due to the potential change of the cells adjacent in a word line direction, the reliability of a flash memory can be enhanced. Memory cells of a flash memory are formed in p-type wells of a semiconductor substrate and include gate insulator films, floating gates, high-K insulator films, and control gates (word lines). The floating gates and control gates (word lines) are isolated by high-K insulator films. The plurality of memory cells arrayed in row a direction are isolated by isolation trenches extending in a column direction. In the isolation trenches, a silicon oxide film is embedded. In the silicon oxide film, an air gap is provided. A lower end of the air gap extends near to the bottom of the isolation trench, and its upper end extends further above the upper surface of the high-K insulator film covering the floating gate.
Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 .mu.m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.
Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 .mu.m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.
Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 .mu.m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.