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Patent # Description
2017/0117287 NONVOLATILE MEMORY DEVICES HAVING SINGLE-LAYERED GATES AND METHODS OF FABRICATING THE SAME
A nonvolatile memory device includes an active region extending in a first direction and including a source region and a drain region that are respectively...
2017/0117286 SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC DEVICE
A semiconductor device includes a substrate, a first transistor, and a second transistor. The first transistor includes a first source terminal formed of a...
2017/0117284 ONE-TIME PROGRAMMABLE MEMORY CELL CAPABLE OF REDUCING LEAKAGE CURRENT AND PREVENTING SLOW BIT RESPONSE, AND...
A one time programmable (OTP) memory cell includes a select gate transistor, a following gate transistor, and an antifuse varactor. The select gate transistor...
2017/0117274 UNMERGED EPITAXIAL PROCESS FOR FINFET DEVICES WITH AGGRESSIVE FIN PITCH SCALING
Semiconductor devices and methods for making the same includes conformally forming a first spacer on a plurality of fins. A second spacer is conformally formed...
2017/0117268 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
In a semiconductor integrated circuit device, a plurality of electrode pads for external connection are arranged in a zigzag pattern. Some electrode pads of...
2017/0117259 A FLIP-CHIP STRUCTURE OF GROUP III SEMICONDUCTOR LIGHT EMITTING DEVICE
This application refers to a flip-chip structure of Group III semiconductor light emitting device. The flip-chip structure includes: a substrate, a buffer...
2017/0117252 Printed Circuit Boards and Semiconductor Packages Including the Same
A printed circuit board (PCB) for reducing a size of a semiconductor package and a semiconductor package including the same are provided. The PCB includes a...
2017/0117246 METHOD AND APPARATUS FOR CREATING A BOND BETWEEN OBJECTS BASED ON FORMATION OF INTER-DIFFUSION LAYERS
The present disclosure provides a method of creating a bond between a first object and a second object. For example, creating a joint or die attach between a...
2017/0117228 SUSCEPTOR FOR HOLDING A SEMICONDUCTOR WAFER HAVING AN ORIENTATION NOTCH, A METHOD FOR DEPOSITING A LAYER ON A...
A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement...
2017/0117225 LOW RESISTANCE CONTACT STRUCTURES INCLUDING A COPPER FILL FOR TRENCH STRUCTURES
An electrical device is provided that includes at least one contact surface and an interlevel dielectric layer present atop the electrical device. The...
2017/0117217 ISOLATION DEVICE
An isolation device for isolating a first signal of a first circuit from a second circuit disclosed. The isolation device may have a substrate and a plurality...
2017/0117212 SEMICONDUCTOR DEVICE
A semiconductor device includes: opposed first and second metal plates; a plurality of semiconductor elements each interposed between the first metal plate and...
2017/0117211 CLIP AND RELATED METHODS
A clip for a semiconductor package. Implementations may include: an electrically conductive clip having a first end and a second end and a middle section...
2017/0117210 LEADFRAME
A leadframe includes an individual region to become a semiconductor device, and an outer frame part supporting the individual region through its peripheral...
2017/0117204 SOLDER BUMP PLACEMENT FOR THERMAL MANAGEMENT IN FLIP CHIP AMPLIFIERS
Metal pillars are placed adjacent to NPN transistor arrays that are used in the power amplifier for RF power generation. By placing the metal pillars in...
2017/0117194 ASPECT RATIO FOR SEMICONDUCTOR ON INSULATOR
A method comprises forming a first set of one or more fins in a first region from an insulated substrate and a second set of one or more fins in a second...
2017/0117191 METHOD AND STRUCTURE FOR CMOS METAL GATE STACK
A method for forming a semiconductor device includes providing a substrate, the substrate including a first trench in an NMOS region and a second trench in a...
2017/0117187 SYSTEM ON CHIP MATERIAL CO-INTEGRATION
A method, and the resulting structure, of a semiconductor device where a first and second gate structure is formed above a Semiconductor-on-Insulator (SOI)...
2017/0117181 LOW RESISTANCE CONTACT STRUCTURES INCLUDING A COPPER FILL FOR TRENCH STRUCTURES
An electrical device is provided that includes at least one contact surface and an interlevel dielectric layer present atop the electrical device. The...
2017/0117177 SELF ALIGNED VIA AND PILLAR CUT FOR AT LEAST A SELF ALIGNED DOUBLE PITCH
A method of forming via openings that includes forming sidewall spacers on a plurality of mandrels that are overlying a hardmask layer that is present on an...
2017/0117170 Front Opening Ring Pod
A pod for exchanging consumable parts with a process module includes a base plate having a front side, a back side, and first and second lateral sides. A first...
2017/0117168 BOND HEAD ASSEMBLIES, THERMOCOMPRESSION BONDING SYSTEMS AND METHODS OF ASSEMBLING AND OPERATING THE SAME
A bond head assembly for bonding a semiconductor element to a substrate is provided. The bond head assembly includes a base structure, a heater, and a clamping...
2017/0117167 METAL ETCH SYSTEM
Embodiments of systems and methods of etching material from the surface of a wafer are provided. In one representative embodiment, an apparatus comprises a...
2017/0117160 SUBSTRATE PROCESSING DEVICE
In a substrate processing method, a substrate holding unit holds a substrate in a horizontal position, a processing liquid supplying unit supplies first and...
2017/0117157 GAPFILL FILM MODIFICATION FOR ADVANCED CMP AND RECESS FLOW
Implementations described herein relate to methods for forming gap fill materials. After the gap fill material is deposited and before a CMP process is...
2017/0117155 METHOD OF FORMING LOW RESISTIVITY FLUORINE FREE TUNGSTEN FILM WITHOUT NUCLEATION
Provided herein are methods of depositing fluorine-free tungsten by sequential CVD pulses, such as by alternately pulsing a chlorine-containing tungsten...
2017/0117154 SEMICONDUCTOR STRUCTURES AND FABRICATION METHOD THEREOF
A method for fabricating a semiconductor structure includes providing a substrate, forming an interface layer on the substrate, and then performing a first...
2017/0117149 METHOD OF FORMING NON-CONTINUOUS LINE PATTERN AND NON-CONTINUOUS LINE PATTERN STRUCTURE
A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer...
2017/0117143 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
In an LCD driver, in a high voltage resistant MISFET, end portions of a gate electrode run onto electric field relaxing insulation regions. Wires to become...
2017/0117139 SYSTEM AND METHOD FOR REMOVING DIELECTRIC MATERIAL
A system is described for removing a dielectric gel, which has been layered atop the electrical components of a failed electrical system, without further...
2017/0117136 FABRICATION METHOD OF SEMICONDUCTOR MULTILAYER STRUCTURE
The present invention is directed to a fabrication method of a semiconductor multilayer structure. By utilizing the indium-containing catalyst and/or...
2017/0117120 MgO-BASED CERAMIC FILM, MEMBER FOR SEMICONDUCTOR MANUFACTURING APPARATUS, AND METHOD FOR FORMING MgO-BASED...
A MgO-based ceramic film according to the present invention contains crystalline phases of MgO and MgAl.sub.2O.sub.4, and Al is dissolved in the MgO to form a...
2017/0117111 ISOLATED CONTROL CIRCUIT AND DRIVER FOR MICRO-ELECTROMECHANICAL SYSTEM SWITCH
A switching system includes a control circuit that receives On-Off signals indicative of a desired operating state of a switch. The control circuit includes an...
2017/0117108 Systems and Methods for Occupancy Prediction
A system for occupancy prediction includes one or more occupancy sensors configured to detect a current occupancy state of one or more detection zones...
2017/0117091 POWER CONVERTER TRANSFORMER WITH REDUCED LEAKAGE INDUCTANCE
A transformer for use in a power converter includes a first winding including a plurality of layers wound around a magnetic core. A first exclusionary winding...
2017/0117085 Magnetic Structures with Self-Enclosed Magnetic Paths
A structure comprises a first portion of a winding having a first almost enclosed shape, a second portion of the winding having a second almost enclosed shape...
2017/0117080 SUPPORT DEVICE OF AN ACTIVE PART OF A CURRENT TRANSFORMER
A support device of an active part of a current transformer includes a plurality of insulating support legs which are composed of an electrically insulating...
2017/0117078 IGNITION APPARATUS FOR INTERNAL COMBUSTION ENGINE
An ignition apparatus includes a blow-off determining unit. The blow-off determining unit determines, when a secondary electric current drops below a...
2017/0117062 METHOD AND DEVICE FOR CONTROL OF OXYGEN CONCENTRATION IN THE REACTOR PLANT AND NUCLEAR REACTOR PLANT
The method and system for control of oxygen concentration in the coolant of a reactor plant including a reactor, coolant in the reactor, gas system,...
2017/0117058 NON-VOLATILE MEMORY CELL HAVING MULRTIPLE SIGNAL PATHWAYS TO PROVIDE ACCESS TO AN ANTIFUSE OF THE MEMORY CELL
A non-volatile memory cell, having an antifuse for storing data, is disclosed for use in a non-volatile data storage device. The non-volatile memory cell...
2017/0117056 MEMORY DEVICE AND AN EDGE WORD LINE MANAGEMENT METHOD THEREOF
An edge word line management method includes performing an erase operation on a memory device in response to an erase command, randomly determining data of a...
2017/0117048 NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME
In a method of programming a three-dimensional nonvolatile memory device, a program loop is executed at least one time, wherein the program loop includes a...
2017/0117046 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
A non-volatile semiconductor memory device having an improved layout structure to achieve low power consumption, high speed and miniaturization is provided. A...
2017/0117033 REFRESH METHOD OF CONTROLLING SELF-REFRESH CYCLE WITH TEMPERATURE
Provided is a method of refreshing a memory device by controlling a self-refresh cycle according to temperature. In the method, first self-refresh and second...
2017/0117031 INTERNAL STROBE SIGNAL GENERATING CIRCUIT CAPABLE OF SELECTING DATA RATE AND SEMICONDUCTOR APPARATUS INCLUDING...
An internal strobe signal generating circuit may include a data rate selection circuit, a division circuit and a strobe output circuit. The data rate selection...
2017/0117029 BIAS CONFIGURATION FOR WRITE OPERATIONS IN MEMORY
Techniques and circuits for testing and configuring bias voltage or bias current for write operations in memory devices are presented. Registers and...
2017/0117022 Location-Based Optimization for Memory Systems
Various implementations described herein are directed to a method of integrated circuit design and fabrication. In the implementation of a memory integrated...
2017/0117014 EFFICIENT RECOVERY OF THE CODEWORD INTERLEAVE ADDRESS
In one embodiment, a system includes a data processing unit configured to read encoded data from a magnetic tape medium. The data processing unit is also...
2017/0116983 SPEECH COLLECTOR IN CAR CABIN
An apparatus includes a first microphone disposed near a first seat in a car cabin, the first seat configured to seat a first occupant, a second microphone...
2017/0116976 VIBRATION DAMPED SOUND SHIELD
A sound absorption panel (201) is constructed on an acoustically thin sheet (203) to provide an acoustic/vibrational energy absorption metamaterial structure....
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