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Patent # Description
2017/0147387 IDENTIFYING KERNEL DATA STRUCTURES
Execution state information corresponding to an instantiated virtual machine are retrieved. A score to indicate a target memory location is able to be...
2017/0147386 TEARING DOWN VIRTUAL MACHINES IMPLEMENTING PARALLEL OPERATORS IN A STREAMING APPLICATION BASED ON PERFORMANCE
A streams manager monitors performance of parallel portions of a streaming application implemented in multiple virtual machines (VMs). When the performance...
2017/0147385 METHOD AND SYSTEM FOR VIRTUAL PORT COMMUNICATIONS
A method and system may provide virtual port communications. A data frame, containing a destination identifier in a destination field and payload, may be...
2017/0147384 VIRTUAL COMPUTING ENVIRONMENTS
Methods, systems, and apparatus, including computer program products, for discovering entities in a first portion of a data center network, examining...
2017/0147383 IDENTIFICATION OF CROSS-INTERFERENCE BETWEEN WORKLOADS IN COMPUTE-NODE CLUSTERS
A method includes monitoring performance of a plurality of workloads that run on multiple compute nodes. Respective time series of anomalous performance events...
2017/0147382 PROVISIONING BASED ON WORKLOAD DISPLACEMENT
A method, system, and computer program product are disclosed for creating an in-memory application image. Embodiments can include receiving an application from...
2017/0147381 MANAGING VIRTUAL COMPUTING NODES
Systems and method for the management of virtual machine instances are provided. A network data transmission analysis system can use contextual information in...
2017/0147380 PERFORMING VIRTUAL MACHINE LIVE MIGRATION WITHIN A THRESHOLD TIME BY ADDING AVAILABLE NETWORK PATH IN MULTIPATH...
An estimated time to migrate a VM from a source hypervisor to a target hypervisor is calculated. The estimated time is compared to a threshold time and based...
2017/0147379 VIRTUALIZED PERFORMANCE PROFILING AND MONITORING
An embodiment includes a system, comprising: a communication interface configured to communicate with a remote system external to the system; a memory; and a...
2017/0147378 VIRTUAL MACHINE TO HOST DEVICE BRIDGING
In an example embodiment, a hypervisor exposes a first guest device to a first virtual machine. The hypervisor exposes a virtual host device and a pass-through...
2017/0147377 LAZY TIMER PROGRAMMING FOR VIRTUAL MACHINES
A system and method for programming a timer in a virtualized system are disclosed. In accordance with one embodiment, a hypervisor executed by a processing...
2017/0147376 INPUT OUPUT MEMORY MANAGEMENT UNIT BASED ZERO COPY VIRTUAL MACHINE TO VIRTUAL MACHINE COMMUNICATION
In an example embodiment, a hypervisor exposes a virtual input-output memory management unit (IOMMU) to a first virtual machine. The first virtual machine...
2017/0147375 PROVISIONING BASED ON WORKLOAD DISPLACEMENT
A method, system, and computer program product are disclosed for creating an in-memory application image. Embodiments can include receiving an application from...
2017/0147374 VIRTUAL PCI DEVICE BASED HYPERVISOR BYPASS FOR VM BRIDGING
In an example embodiment, a hypervisor exposes a first guest device to a first virtual machine and a second guest device to a second virtual machine. The...
2017/0147373 TECHNOLOGY FOR DYNAMIC RESOURCE POOL MASTER
For managing a pool of virtual computer systems, master status and a rebasing task are assigned to at least one virtual computer system of the pool. A...
2017/0147372 IDENTIFICATION AND REMOVAL OF ZOMBIE VIRTUAL MACHINES
A method and a computer program product for causing a processor to perform the method are provided. The method includes creating a virtual machine having a...
2017/0147371 VIRTUAL MACHINE MIGRATION USING MEMORY PAGE HINTS
Methods, systems, and computer program products are provided for migrating memory pages. A virtual machine is run by a hypervisor. The virtual machine includes...
2017/0147370 PCI SLOT HOT-ADDITION DEFERRAL FOR MULTI-FUNCTION DEVICES
A hypervisor receives a request pertaining to a multi-function device managed by the hypervisor from a guest operating system of a virtual machine where the...
2017/0147369 PERFORMANCE-IMBALANCE-MONITORING PROCESSOR FEATURES
The current application is directed to architected hardware support within computer processors for detecting and monitoring various types of potential...
2017/0147368 Dynamic Agent Delivery
The present technology utilizes agents to monitor and report data from Java virtual machines (JVM) to a controller as part of application performance...
2017/0147367 CONFIGURABLE IO-CHANNEL SYSTEM WITH EMBEDDED MICROCONTROLLER
The present technology provides for an IO module system (e.g., an industrial control system) that can provide multiple-channel analog and digital interfaces to...
2017/0147366 METHOD OF CONTROLLING AND MANAGING ELECTRONIC DEVICE AND CONTROL SYSTEM USING SAME
In a method of controlling and managing an electronic device, which is executed by at least one control device to control and manage at least one electronic...
2017/0147365 APPARATUS AND METHOD FOR CONFIGURING IDLE SCREEN
An apparatus and a method for configuring an idle screen in a terminal is provided. The apparatus includes a state sensor for sensing an environmental state a...
2017/0147364 SIMULTANEOUS WEBSITE AND MOBILE APP CREATION METHOD AND SYSTEM
A method of simultaneously creating a website and an app including providing, at the at least one server, a first coding template operably configured to create...
2017/0147363 SYSTEM AND METHOD FOR REDUCING HIBERNATE AND RESUME TIME
A method for conserving power in a computing device having a volatile system memory, a non-volatile storage device, and a processor executing an operating...
2017/0147362 STAND-BY MODE OF AN ELECTRONIC CIRCUIT
A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a...
2017/0147361 TECHNIQUES TO CONFIGURE MULTI-MODE STORAGE DEVICES IN REMOTE PROVISIONING ENVIRONMENTS
Various embodiments are generally directed to an apparatus, method and other techniques to store a first set of instructions in a first portion of the...
2017/0147360 METHOD AND APPARATUS FOR DEVICE SETUP
There are disclosed various methods and apparatuses for a device setup. In some embodiments of the method a signal from a peripheral device is detected by an...
2017/0147359 SYSTEM AND METHOD FOR EXECUTION OF A SECURED ENVIRONMENT INITIALIZATION INSTRUCTION
A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates...
2017/0147358 COMPUTING PERFORMANCE AND POWER MANAGEMENT WITH FIRMWARE PERFORMANCE DATA STRUCTURE
In some embodiments, a PPM interface for a computing platform may be provided with functionality to facilitate, to an OS through the PPM interface, firmware...
2017/0147357 TECHNOLOGIES FOR PRE-MEMORY PHASE INITIALIZATION OF A COMPUTING DEVICE
Technologies for pre-memory phase initialization include a computing device having a processor with a cache memory. The computing device may determine whether...
2017/0147356 SECURELY BOOTING A COMPUTING DEVICE
Technologies for securely booting a computing device includes a security engine of the computing device that consecutively determines a hash value for each...
2017/0147355 METHOD AND SYSTEM FOR ACCELERATING INTELLIGENT TERMINAL BOOT SPEED
The present invention provides a method and a system for accelerating intelligent terminal boot speed, wherein the method for accelerating intelligent terminal...
2017/0147354 ELECTRONIC APPARATUS AND BOOTING METHOD THEREOF
An electronic apparatus and a booting method thereof are provided. Control a sensing unit to sense a barcode before an operation system is executed by the...
2017/0147353 PROCESSOR HAVING MULTIPLE CORES, SHARED CORE EXTENSION LOGIC, AND SHARED CORE EXTENSION UTILIZATION INSTRUCTIONS
An apparatus of an aspect includes a plurality of cores and shared core extension logic coupled with each of the plurality of cores. The shared core extension...
2017/0147352 METHOD OF SYNCHRONIZING INDEPENDENT FUNCTIONAL UNIT
A system for synchronizing parallel processing of a plurality of functional processing units (FPU), a first FPU and a first program counter to control timing...
2017/0147351 VLIW INTERFACE DEVICE AND METHOD FOR CONTROLLING THE SAME
A VLIW (Very Long Instruction Word) interface device includes a memory configured to store instructions and data, and a processor configured to process the...
2017/0147350 DATA PROCESSOR
The RISC data processor is based on the idea that in case that there are many flag-generating instructions, the number of flags generated by each instruction...
2017/0147349 PARSING-ENHANCEMENT FACILITY
An instruction for parsing a buffer to be utilized within a data processing system including: an operation code field, the operation code field identifies the...
2017/0147348 METHOD AND APPARATUS TO PROCESS SHA-2 SECURE HASHING ALGORITHM
A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction...
2017/0147347 METHOD OF SYNCHRONIZING INDEPENDENT FUNCTIONAL UNIT
A system for synchronizing parallel processing of a plurality of functional processing units (FPU), a first FPU and a first program counter to control timing...
2017/0147346 APPARATUS AND METHOD FOR MANAGING A BRANCH INFORMATION STORAGE
An apparatus and method are provided for managing a branch information storage. The apparatus has a processor to process instructions, comprising fetch...
2017/0147345 MULTIPLE OPERATION INTERFACE TO SHARED COPROCESSOR
In a multi-processor architecture, a plurality of processors share a coprocessor for certain instructions. Each processor may supply the coprocessor with a...
2017/0147344 MEMORY ADDRESS COLLISION DETECTION OF ORDERED PARALLEL THREADS WITH BLOOM FILTERS
A semiconductor chip is described having a load collision detection circuit comprising a first bloom filter circuit. The semiconductor chip has a store...
2017/0147343 METHOD AND APPARATUS TO PROCESS SHA-2 SECURE HASHING ALGORITHM
A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction...
2017/0147342 METHOD AND APPARATUS TO PROCESS SHA-2 SECURE HASHING ALGORITHM
A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction...
2017/0147341 METHOD AND APPARATUS TO PROCESS SHA-2 SECURE HASHING ALGORITHM
A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction...
2017/0147340 METHOD AND APPARATUS TO PROCESS SHA-2 SECURE HASHING ALGORITHM
A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction...
2017/0147339 COMPUTER READABLE STORAGE MEDIA AND METHODS FOR INVOKING AN ACTION DIRECTLY FROM A SCANNED CODE
Systems and methods for performing functions are disclosed herein. An example non-transitory computer-readable storage medium may store one or more programs,...
2017/0147338 METHOD AND SYSTEM FOR CONTROLLING SOFTWARE RISKS FOR SOFTWARE DEVELOPMENT
A computer system, method, or computer-readable medium controls a potentially unacceptable software component intended for a software repository. A pre-defined...
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