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Patent # | Description |
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2017/0162673 |
GATE-ALL-AROUND FIN DEVICE A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a... |
2017/0162672 |
SBFET TRANSISTOR AND CORRESPONDING FABRICATION PROCESS A process for manufacturing a Schottky barrier field-effect transistor is provided. The process includes: providing a structure including a control gate and a... |
2017/0162671 |
FIN FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD TO FORM DEFECT FREE
MERGED SOURCE AND DRAIN EPITAXY FOR LOW... A method of forming a semiconductor device that includes providing a plurality of fin structures, wherein a surface of the fin structures has a first... |
2017/0162670 |
METHODS FOR FABRICATING SEMICONDUCTOR DEVICES HAVING FIN-SHAPED PATTERNS A method for fabricating a semiconductor device is provided. The method includes forming a first fin-shaped pattern including an upper part and a lower part on... |
2017/0162669 |
METHOD OF FORMING THE GATE ELECTRODE OF FIELD EFFECT TRANSISTOR This description relates to a method of forming the gate electrode of a semiconductor device, the method including providing a substrate comprising a dummy... |
2017/0162668 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME A method of manufacturing a semiconductor device includes forming a fin extending in a first direction. A dummy layer is formed including a plurality of... |
2017/0162667 |
SEMICONDUCTOR MIXED GATE STRUCTURE A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a substrate, a fin structure, a metal gate and... |
2017/0162666 |
METAL-SEMICONDUCTOR-METAL (MSM) HETEROJUNCTION DIODE In one aspect, a diode comprises: a semiconductor layer having a first side and a second side opposite the first side, the semiconductor layer having a... |
2017/0162665 |
SCHOTTKY BARRIER DIODE AND METHOD FOR MANUFACTURING THE SAME A Schottky barrier diode includes: an n+ type of silicon carbide substrate; an n- type of epitaxial layer formed on a first surface of the n+ type of silicon... |
2017/0162664 |
LATERAL BIPOLAR TRANSISTOR A bipolar junction transistor comprises a semiconductor layer disposed on an insulating material, at least a portion of the semiconductor layer forming a base... |
2017/0162663 |
GATE SPACER AND METHODS OF FORMING Methods and structures for forming devices, such as transistors, are discussed. A method embodiment includes forming a gate spacer along a sidewall of a gate... |
2017/0162662 |
SEMICONDUCTOR DEVICE Machining accuracy of an IGBT region is worsened due to a height difference caused by polysilicon. Therefore, there is a problem that characteristic variation... |
2017/0162661 |
SEMICONDUCTOR DEVICE CONTACTS Techniques are disclosed for forming contacts in silicon semiconductor devices. In some embodiments, a transition layer forms a non-reactive interface with the... |
2017/0162660 |
Semiconductor Device Comprising a Field Effect Transistor and Method of
Manufacturing the Semiconductor Device A semiconductor device comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a... |
2017/0162659 |
SEMICONDUCTOR DEVICE A stable high-frequency amplification characteristic with a high power is obtained by providing a source field plate electrode in an area of a drain electrode... |
2017/0162658 |
LDMOS with Adaptively Biased Gate-Shield An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than... |
2017/0162657 |
POST GROWTH DEFECT REDUCTION FOR HETEROEPITAXIAL MATERIALS A method of reducing defects in epitaxially grown III-V semiconductor material comprising: epitaxially growing a III-V semiconductor on a substrate; patterning... |
2017/0162656 |
INTEGRATED CMOS WAFERS The present disclosure relates to semiconductor structures and, more particularly, to integrated CMOS wafers and methods of manufacture. The structure... |
2017/0162655 |
SCHOTTKY BARRIER DIODE A semiconductor device includes a semiconductor layer including a Ga.sub.2O.sub.3-based single crystal, and an electrode that is in contact with a surface of... |
2017/0162654 |
FIELD EFFECT TRANSISTOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME A field effect transistor and a semiconductor device including the same are provided. The semiconductor device may include a channel layer, which is provided... |
2017/0162653 |
SEMICONDUCTOR DEVICE HAVING GERMANIUM ACTIVE LAYER WITH UNDERLYING
DIFFUSION BARRIER LAYER Semiconductor devices having germanium active layers with underlying diffusion barrier layers are described. For example, a semiconductor device includes a... |
2017/0162652 |
NANOWIRE DEVICE AND METHOD OF MANUFACTURING THE SAME A method of manufacturing a nanowire device is disclosed. The method includes providing a substrate, wherein the substrate comprises a pair of support pads, a... |
2017/0162651 |
SEMICONDUCTOR DEVICE HAVING A GATE ALL AROUND STRUCTURE AND A METHOD FOR
FABRICATING THE SAME A semiconductor device includes a wire pattern spaced apart from a substrate and extended in a first direction, a gate electrode disposed around a... |
2017/0162650 |
FINFET WITH REDUCED PARASITIC CAPACITANCE A semiconductor device including at least one fin extending upward from a substrate and a gate on the substrate, wherein the gate includes outer sidewalls,... |
2017/0162649 |
TRENCH-GATE TYPE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR There is provided a trench-gate type semiconductor device that can prevent breakdown of a gate insulating film caused by a displacement current flowing into a... |
2017/0162648 |
Capacitor Formed On Heavily Doped Substrate The teachings of the present disclosure may be applied to the manufacture and design of capacitors. In some embodiments of these teachings, a capacitor may be... |
2017/0162647 |
SUBSTRATE RESISTOR WITH OVERLYING GATE STRUCTURE An illustrative method includes, among other things, forming a plurality of fins. A subset of the plurality of fins is selectively removed, leaving at least a... |
2017/0162646 |
PILLAR RESISTOR STRUCTURES FOR INTEGRATED CIRCUITRY Integrated circuit structures including a pillar resistor disposed over a surface of a substrate, and fabrication techniques to form such a resistor in... |
2017/0162645 |
DISPLAY DEVICE A display device includes contact holes opened in an insulating film outside of a display area in which pixels are arranged, and having a conductive film... |
2017/0162644 |
Display Device A display device having a high aperture ratio and including a capacitor that can increase capacitance is provided. A pair of electrodes of the capacitor is... |
2017/0162643 |
OLED DISPLAY, DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF An organic light emitting diode (OLED) display, a display device and a manufacturing method thereof are provided. The OLED display includes a base substrate;... |
2017/0162642 |
LIGHT EMITTING DEVICE The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds... |
2017/0162641 |
DISPLAY DEVICE, METHOD OF MANUFACTURING DISPLAY DEVICE, AND ELECTRONIC
APPARATUS A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate... |
2017/0162640 |
THIN FILM TRANSISTOR ARRAY PANEL AND ORGANIC LIGHT EMITTING DIODE DISPLAY
INCLUDING THE SAME An exemplary embodiment of the present invention provides a thin film transistor array panel and an organic light emitting diode display including the same... |
2017/0162639 |
AMOLED BACKPLANE STRUCTURE AND MANUFACTURING METHOD THEREOF A manufacturing method of an AMOLED backplane includes manufacturing a TFT substrate and forming a corrugation structure on the TFT substrate, which includes... |
2017/0162638 |
METHOD FOR MANUFACTURING ORGANIC EL DISPLAY PANEL An organic EL display panel manufacturing method including: preparing a substrate; forming at least first electrodes on the substrate; forming, by performing... |
2017/0162637 |
DISPLAY DEVICE A display device includes a substrate including a first surface, and a second surface opposite the first surface, and defining a through portion passing... |
2017/0162636 |
TRANSPARENT DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME A transparent display device that may improve light transmittance in a transmissive mode, and a method for fabricating the same are discussed. The transparent... |
2017/0162634 |
OLED Display Device And Display Apparatus Including The Same An OLED display device includes a substrate and an OLED display units formed on the substrate, in which n is an integer which is greater than 1. The OLED... |
2017/0162633 |
ORGANIC LIGHT EMITTING DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME An exemplary embodiment discloses an organic light emitting display panel including a base substrate comprising first pixels configured to emit a light having... |
2017/0162632 |
ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE An organic light emitting diode display device can include a display panel including a plurality of pixels, at least one pixel among the plurality of pixels... |
2017/0162631 |
ORGANIC LIGHT-EMITTING DIODE DISPLAY PANEL, ELECTRONIC DEVICE AND
MANUFACTURING METHOD The present disclosure provides an OLED display panel, an electronic device, and a manufacturing method. The OLED display panel comprises a substrate, and a... |
2017/0162630 |
Light-Emitting Device There is provided a light emitting device which enables a color display with good color balance. A triplet compound is used for a light emitting layer of an EL... |
2017/0162629 |
DISPLAY SUBSTRATE, MANUFACTURING METHOD AND DRIVING METHOD THEREOF, AND
DISPLAY DEVICE A display substrate, a manufacturing method and a driving method thereof, and a display device are provided. The display substrate includes a substrate, a gate... |
2017/0162628 |
ULTRALOW POWER CARBON NANOTUBE LOGIC CIRCUITS AND METHOD OF MAKING SAME A method of fabricating a CMOS logic device with SWCNTs includes forming a plurality of local metallic gate structures on a substrate by depositing a metal on... |
2017/0162627 |
METHOD FOR PRODUCING A RESISTIVE MEMORY CELL A method for manufacturing a memory cell includes forming a stack of layers comprising a first electrode and a dielectric layer, and forming a second... |
2017/0162626 |
ENCAPSULATION OF MAGNETIC TUNNEL JUNCTION STRUCTURES IN ORGANIC
PHOTOPATTERNABLE DIELECTRIC MATERIAL Methods and devices are provided to construct magnetic devices, such as magnetic random access memory devices, having MTJ (magnetic tunnel junction) structures... |
2017/0162625 |
SOLID-STATE IMAGING DEVICE, METHOD FOR PRODUCING SOLID-STATE IMAGING
DEVICE, AND ELECTRONIC APPARATUS This solid-state imaging device 100 has: a photosensitive part that includes pixel portions 211, which are disposed in a matrix, and charge transfer parts 212... |
2017/0162624 |
SOLID-STATE IMAGE PICKUP DEVICE, MANUFACTURING METHOD, AND ELECTRONIC
APPARATUS The present disclosure relates to a solid-state image pickup device, a manufacturing method, and an electronic apparatus, which can obtain high charge transfer... |
2017/0162623 |
PHOTOELECTRIC CONVERSION APPARATUS AND METHOD OF MANUFACTURING THE SAME A method of manufacturing a photoelectric conversion apparatus includes forming a first semiconductor region of a first conductivity type in a trench provided... |