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Patent # Description
2017/0186895 AVALANCHE PHOTODIODE USING SILICON NANOWIRE AND SILICON NANOWIRE PHOTOMULTIPLIER USING THE SAME
Disclosed is an avalanche photodiode using a silicon nanowire, including a first silicon nanowire formed of silicon (Si), a first conductive region formed by...
2017/0186894 SOLAR CELL AND METHOD FOR PRODUCING SOLAR CELL
A solar cell includes: first and second conductivity type diffusion layers which are formed on a backside of a light-receiving surface of a substrate, first...
2017/0186893 METHODS OF GROWING HETEROEPITAXIAL SINGLE CRYSTAL OR LARGE GRAINED SEMICONDUCTOR FILMS AND DEVICES THEREON
A method is provided for making smooth crystalline semiconductor thin-films and hole and electron transport films for solar cells and other electronic devices....
2017/0186892 SOLAR CELL
A solar cell having an electrical modulating stack layer is provided. The solar cell includes a first electrode, a second electrode, a photoelectric conversion...
2017/0186891 WINDOW STRUCTURE, METHOD OF MANUFACTURING THE SAME, ELECTRONIC DEVICE EQUIPPED WITH A CAMERA INCLUDING A WINDOW...
A window structure includes a window, a design layer structure on the window, a light shield layer on the design layer structure, and a light absorption layer....
2017/0186890 PHOTOVOLTAIC CELL WITH POROUS SEMICONDUCTOR REGIONS FOR ANCHORING CONTACT TERMINALS, ELECTROLITIC AND ETCHING...
A photovoltaic cell is proposed. The photovoltaic cell includes a substrate of semiconductor material, and a plurality of contact terminals each one arranged...
2017/0186889 LEAD-TELLURIUM INORGANIC REACTION SYSTEMS
The invention provides an electroconductive paste comprising metallic particles, an inorganic reaction system, and an organic vehicle. The inorganic reaction...
2017/0186887 PV-MODULE AND METHOD FOR MAKING A SOLDER JOINT
According to various embodiments, a particle containing structured solder material is provided as solder material for joining a solar cell connector with a...
2017/0186886 Sensor and Method for Fabricating the Same
A sensor includes a first reception unit configured for sensing a first signal of a first frequency band and a second reception unit configured for sensing a...
2017/0186885 SOLAR CELL HAVING A PLURALITY OF SUB-CELLS COUPLED BY A METALLIZATION STRUCTURE HAVING A METAL BRIDGE
Solar cells having a plurality of sub-cells coupled by metallization structures having a metal bridge, and singulation approaches to forming solar cells having...
2017/0186884 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type,...
2017/0186883 MEMORY TRANSISTOR WITH MULTIPLE CHARGE STORING LAYERS AND A HIGH WORK FUNCTION GATE ELECTRODE
Semiconductor devices including non-volatile memory transistors and methods of fabricating the same to improve performance thereof are provided. In one...
2017/0186882 VERTICAL SUPER-THIN BODY SEMICONDUCTOR ON DIELECTRIC WALL DEVICES AND METHODS OF THEIR FABRICATION
The present invention is a semiconductor device comprising a semiconducting low doped vertical super-thin body (VSTB) formed on Dielectric Body Wall (such as...
2017/0186881 CARBON NANOSTRUCTURE DEVICE FABRICATION UTILIZING PROTECT LAYERS
Hall effect devices and field effect transistors are formed incorporating a carbon-based nanostructure layer such as carbon nanotubes and/or graphene with a...
2017/0186880 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A MISFET is formed to include: a co-doped layer that is formed over a substrate and has an n-type semiconductor region and a p-type semiconductor region; and a...
2017/0186879 Thin Film Transistor, Array Substrate and Manufacturing Processes of Them
A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing thereof are disclosed. The thin film transistor includes a...
2017/0186878 MANUFACTURING METHOD FOR TFT ARRAY SUBSTRATE, TFT ARRAY SUBSTRATE AND DISPLAY DEVICE
The disclosure provides a manufacturing method for TFT array substrate, a TFT array substrate and a display device. The manufacturing method includes following...
2017/0186877 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR
A thin film transistor is provided. The thin film transistor includes a substrate, an active pattern disposed on the substrate and including a nitride, a...
2017/0186876 ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME
Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region;...
2017/0186874 METHOD OF PRODUCTION OF SEMICONDUCTOR DEVICE
A method of production of a semiconductor device comprising a semiconductor layer forming step of forming a semiconductor layer including an inorganic oxide...
2017/0186873 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A method of fabricating a semiconductor device is provided as follows. An epitaxial layer is formed on an active fin structure. Metal gate electrodes are...
2017/0186872 SEMICONDUCTOR DEVICE INCLUDING FIN SHAPED STRUCTURE
A semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure includes a top portion...
2017/0186871 Semiconductor Structures and Methods with High Mobility and High Energy Bandgap Materials
An embodiment is a structure comprising a substrate, a high energy bandgap material, and a high carrier mobility material. The substrate comprises a first...
2017/0186870 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate...
2017/0186869 SEMICONDUCTOR DEVICES INCLUDING A STRESSOR IN A RECESS AND METHODS OF FORMING THE SAME
Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a trench...
2017/0186868 SILICON GERMANIUM FIN IMMUNE TO EPITAXY DEFECT
A method for forming a semiconductor structure includes forming at least one fin on a semiconductor substrate. The least one fin includes a semiconducting...
2017/0186867 Semiconductor Device Including An Epitaxy Region
An exemplary method includes forming a dummy gate structure over a substrate and forming a set of spacers adjacent to the dummy gate structure. The set of...
2017/0186866 VERTICAL FIELD EFFECT TRANSISTOR HAVING A DISC SHAPED GATE
A vertical FET, including a source layer, a channel layer, a drain layer and a gate dielectric, the source layer being coupled with a source electrode, the...
2017/0186865 POWER MOSFETS AND METHODS FOR FORMING THE SAME
Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) and methods of forming the same are provided. A power MOSFET may comprise a first drift...
2017/0186864 SEMICONDUCTOR DEVICE
A semiconductor device according to an embodiment is provided with a plurality of active barrier sections each of which is enclosed by a plurality of element...
2017/0186863 Method of Producing an Integrated Power Transistor Circuit Having a Current-Measuring Cell
A method for producing an integrated power transistor circuit includes forming at least one transistor cell in a cell array, each transistor cell having a...
2017/0186861 Method of Forming a Semiconductor Structure Having Integrated Snubber Resistance
A semiconductor structure is disclosed. The semiconductor structure includes a source trench in a drift region, the source trench having a source trench...
2017/0186860 Tined Gate to Control Threshold Voltage in a Device Formed of Materials Having Piezoelectric Properties
Roughly described, a field effect transistor has a first piezoelectric layer supporting a channel, a second piezoelectric layer over the first piezoelectric...
2017/0186859 NON-ETCH GAS COOLED EPITAXIAL STACK FOR GROUP IIIA-N DEVICES
A method of fabricating an epitaxial stack for Group IIIA-N transistors includes depositing at least one Group IIIA-N buffer layer on a substrate in a...
2017/0186858 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided....
2017/0186857 GATE STRUCTURE OF FIELD EFFECT TRANSISTOR WITH FOOTING
In some embodiments, a field effect transistor structure includes a first semiconductor structure and a gate structure. The first semiconductor structure...
2017/0186856 METHOD FOR MANUFACTURING LDMOS DEVICE
A method for manufacturing an LDMOS device includes: providing a semiconductor substrate (200), forming a drift region (201) in the semiconductor substrate...
2017/0186855 FIELD EFFECT TRANSISTOR STRUCTURE WITH ABRUPT SOURCE/DRAIN JUNCTIONS
Microelectronic structures embodying the present invention include a field effect transistor (FET) having highly conductive source/drain extensions. Formation...
2017/0186854 EXTREMELY THIN SILICON-ON-INSULATOR SILICON GERMANIUM DEVICE WITHOUT EDGE STRAIN RELAXATION
A method for forming a semiconductor structure includes forming a strained silicon germanium layer on top of a substrate. At least one patterned hard mask...
2017/0186853 METHOD OF FORMING GATE STRUCTURE OF A SEMICONDUCTOR DEVICE
A method of fabricating a semiconductor device includes forming a gate strip including a dummy electrode and a TiN layer. The method includes removing a first...
2017/0186852 SEMICONDUCTOR DEVICE WITH IMPROVED NARROW WIDTH EFFECT AND METHOD OF MAKING THEREOF
A device and a method for forming a device are disclosed. The method includes providing a substrate prepared with a device region. A device well having second...
2017/0186850 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
To provide a semiconductor device having improved reliability. After formation of an n+ type semiconductor region for source/drain, a first insulating film is...
2017/0186849 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
A semiconductor device includes a first gate structure disposed on a substrate and extending in a first direction. The first gate structure includes a first...
2017/0186848 SEMICONDUCTOR DEVICES WITH WIDER FIELD GATES FOR REDUCED GATE RESISTANCE
Semiconductor devices with wider field gates for reduced gate resistance are disclosed. In one aspect, a semiconductor device is provided that employs a gate....
2017/0186847 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device according to the present invention includes: a semiconductor layer including a first conductivity type semiconductor region and a second...
2017/0186846 NANOWIRE DEVICE WITH REDUCED PARASITICS
A nanowire transistor is provided that includes a well implant having a local isolation region for insulating a replacement metal gate from a parasitic...
2017/0186845 TRANSISTOR USING SELECTIVE UNDERCUT AT GATE CONDUCTOR AND GATE INSULATOR CORNER
Methods form transistor structures that include, among other components, a substrate having an active region bordered by an isolation region, a gate insulator...
2017/0186844 SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE, METHOD FOR MANUFACTURING THE SAME, AND MEMORY CELL HAVING...
A semiconductor device includes at least one trench extending into a semiconductor substrate and lined with a gate dielectric layer; a dipole inducing layer...
2017/0186843 Metal Oxide Film and Semiconductor Device
A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a...
2017/0186842 SIDEWALL IMAGE TRANSFER NANOSHEET
A method for forming active regions of a semiconductor device comprising forming a nanosheet stack on a substrate, forming the nanosheet stack comprising...
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