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Patent # Description
2017/0186787 IMAGING DEVICE AND ELECTRONIC DEVICE
An imaging device with excellent imaging performance is provided. The imaging device has a first circuit including a first photoelectric conversion element and...
2017/0186785 METHODS OF MANUFACTURING THIN FILM TRANSISTOR AND ARRAY SUBSTRATE
A method of manufacturing a thin film transistor is disclosed. The method of manufacturing the thin film transistor includes: manufacturing a substrate;...
2017/0186784 TFT and Manufacturing Method Thereof, Array Substrate and Manufacturing Method Thereof, and Display Device
A thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The...
2017/0186783 METHOD FOR MANUFACTURING N-TYPE TFT
The present invention provides a method for manufacturing the N-type TFT, which includes subjecting a light shielding layer to a grating like patternization...
2017/0186782 PIXEL CIRCUIT OF ACTIVE-MATRIX LIGHT-EMITTING DIODE AND DISPLAY PANEL HAVING THE SAME
A display includes a pixel circuit. The pixel circuit includes a light emitting diode, a first transistor, a second transistor and a third transistor. The...
2017/0186781 THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY USING THE SAME
A thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same are discussed. The...
2017/0186780 DISPLAY DEVICE
Disclosed is a display device including a seal material and a sealing material. The seal material surrounds a pixel portion and the sealing material overlaps...
2017/0186779 TRANSISTOR AND SEMICONDUCTOR DEVICE
A highly reliable semiconductor device which includes an oxide semiconductor is provided. Alternatively, a transistor having normally-off characteristics which...
2017/0186778 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE
Provided is a novel semiconductor device. The semiconductor device comprises a first transistor and a second transistor. The first transistor comprises a first...
2017/0186777 DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE
A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in...
2017/0186776 ACTIVE LAYER, THIN-FILM TRANSISTOR ARRAY SUBSTRATE COMPRISING THE SAME, AND DISPLAY DEVICE COMPRISING THE SAME
Carbon allotropes, a thin-film transistor array substrate comprising the same, and a display device comprising the same are disclosed. The thin-film transistor...
2017/0186775 FINFET WITH STACKED FACETED S/D EPITAXY FOR IMPROVED CONTACT RESISTANCE
A semiconductor structure including a multi-faceted epitaxial semiconductor structure within both a source region and a drain region and on exposed surfaces of...
2017/0186774 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate...
2017/0186773 TOUCH DRIVE CIRCUIT AND DRIVING METHOD THEREFOR, ARRAY SUBSTRATE AND TOUCH DISPLAY APPARATUS
A touch drive circuit and a driving method therefor, an array substrate and a touch display apparatus relate to a field of display. The driving method...
2017/0186772 Semiconductor Chip Including Integrated Circuit Defined Within Dynamic Array Section
A semiconductor chip includes four linear-shaped conductive structures that each form a gate electrode of corresponding transistor of a first transistor type...
2017/0186771 Semiconductor Chip and Method for Manufacturing the Same
A first transistor has a gate electrode formed by a substantially linear portion of a first conductive structure. A second transistor has a gate electrode...
2017/0186770 3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE
A semiconductor memory, including: a first memory cell including a first transistor; a second memory cell including a second transistor; and a memory...
2017/0186769 SEMICONDUCTOR DEVICE INCLUDING A STACK HAVING A SIDEWALL WITH RECESSED AND PROTRUDING PORTIONS
A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers...
2017/0186767 MEMORY DEVICES
A memory device may include multiple channel regions extending in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode...
2017/0186766 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target...
2017/0186765 Vertical memory having varying storage cell design through the storage cell stack
An apparatus is described having a memory. The memory includes a vertical stack of storage cells, where, a first storage node at a lower layer of the vertical...
2017/0186764 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A performance of a semiconductor device is improved. A film, which is made of silicon, is formed in a resistance element formation region on a semiconductor...
2017/0186763 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A fin includes a first region and a second region arranged on a positive side in an X-axis direction with respect to the first region. A control gate electrode...
2017/0186762 METHOD TO FABRICATE UNIFORM TUNNELING DIELECTRIC OF EMBEDDED FLASH MEMORY CELL
The present disclosure relates to a method of forming an embedded flash memory cell that provides for improved performance by providing for a tunnel dielectric...
2017/0186761 SEMICONDUCTOR MEMORY DEVICE
According to the embodiments, the semiconductor memory device includes a semiconductor substrate, a first conducting layer, a semiconductor layer, a plurality...
2017/0186760 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Embodiments of the inventive concepts provide a method for manufacturing a semiconductor device. The method includes forming a stack structure including...
2017/0186759 INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
An integrated circuit includes a high-voltage MOS (HV) transistor and a capacitor supported by a semiconductor substrate. A gate stack of the HV transistor...
2017/0186758 3-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
Disclosed is a three-dimensional semiconductor memory device, comprising a cell array formed on a first substrate and a peripheral circuit formed on a second...
2017/0186757 METHODS OF FORMING A FERROELECTRIC MEMORY CELL
A method of forming a ferroelectric memory cell. The method comprises forming an electrode material exhibiting a desired dominant crystallographic orientation....
2017/0186755 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a stack including first conductive layers...
2017/0186754 ATOMIC LAYER DEPOSITION OF III-V COMPOUNDS TO FORM V-NAND DEVICES
A method for forming a V-NAND device is disclosed. Specifically, the method involves deposition of at least one of semiconductive material, conductive...
2017/0186753 SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME, MEMORY CELL HAVING THE...
A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a...
2017/0186752 SEMICONDUCTOR DEVICES INCLUDING CAPACITORS AND METHODS OF MANUFACTURING THE SAME
A semiconductor device includes a substrate, a conductive pattern on the substrate, a lower electrode electrically connected to the conductive pattern, a...
2017/0186751 Semiconductor Device and Memory Device Including the Semiconductor Device
To provide a semiconductor device that can reduce power consumption and retain data for a long time and a memory device including the semiconductor device. The...
2017/0186750 MEMORY DEVICE WITH REDUCED-RESISTANCE INTERCONNECT
An interconnect structure includes a lower interconnect layer, an intermediate interconnect layer, and an upper interconnect layer. First and second conductive...
2017/0186749 SEMICONDUCTOR DEVICE
Provided is a semiconductor device capable of holding data for a long period. The semiconductor device includes first to third transistors, a capacitor, and a...
2017/0186748 FinFET Device Having Flat-Top Epitaxial Features and Method of Making the Same
A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a substrate, an isolation structure over the substrate,...
2017/0186747 STRUCTURE AND METHOD FOR SiGe FIN FORMATION IN A SEMICONDUCTOR DEVICE
A method includes forming a semiconductor fin on a semiconductor substrate; depositing a cladding layer on a portion of the semiconductor fin, wherein the...
2017/0186746 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a substrate having an active pattern thereon, a gate electrode intersecting the active pattern, and a spacer on a sidewall of...
2017/0186745 Resistance Mitigation in Physical Design
Various implementations described herein are directed to an integrated circuit with mitigated resistance. The integrated circuit may include a cell having a...
2017/0186743 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a substrate. A source/drain region is formed. A first insulating...
2017/0186742 IMPLEMENTATION OF LONG-CHANNEL THICK-OXIDE DEVICES IN VERTICAL TRANSISTOR FLOW
A method for fabricating a semiconductor structure is provided that includes the steps of: forming a structure including a substrate, a counter-doped layer on...
2017/0186741 INTEGRATED CIRCUITS USING GUARD RINGS FOR ESD SYSTEMS, AND METHODS FOR FORMING THE INTEGRATED CIRCUITS
An integrated circuit includes at least one transistor over a substrate, and a first guard ring disposed around the at least one transistor. The integrated...
2017/0186740 MATRIX-ADDRESSED DEVICE REPAIR
A repairable matrix-addressed system includes a system substrate, an array of electrically conductive row lines, and an array of electrically conductive column...
2017/0186739 PACKAGING OPTOELECTRONIC COMPONENTS AND CMOS CIRCUITRY USING SILICON-ON-INSULATOR SUBSTRATES FOR PHOTONICS...
Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For...
2017/0186738 SEMICONDUCTOR MODULE
According to one embodiment, a semiconductor module includes a first semiconductor element, a second semiconductor element, a first light emitting element and...
2017/0186737 THIN FAN-OUT MULTI-CHIP STACKED PACKAGES AND THE METHOD FOR MANUFACTURING THE SAME
A fan out type multi-chip stacked package includes a chip stacked assembly having a plurality of chips vertically stacked. The electrodes of the chips and one...
2017/0186736 Structure and Formation Method for Chip Package
Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die and a package layer partially or completely...
2017/0186735 LED MODULE
An LED module includes a substrate, one or more LED chips supported by a main surface of the substrate, and wirings. The substrate has one or more through...
2017/0186734 SEMICONDUCTOR PACKAGE
A semiconductor package includes a first chip, a second chip stacked over the first chip and having a different size from the first chip, a first guard unit...
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