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Patent # Description
2017/0229446 PROTECTION ELEMENT, PROTECTION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT
To provide a protection element in which an increase in current due to off-state leakage can be reduced while a drive current can be ensured during an ESD...
2017/0229445 FIELD-EFFECT TRANSISTOR WITH PROTECTION DIODES
A field-effect transistor with protection diodes includes: a field-effect transistor; and a two-terminal electrostatic protection circuit connected between a...
2017/0229444 ESD PROTECTION CIRCUIT
Electrostatic discharge (ESD) protection circuitry in an integrated circuit is provided. The protection circuitry includes a trigger circuit coupled between a...
2017/0229443 ELECTROSTATIC DISCHARGE AND PASSIVE STRUCTURES INTEGRATED IN A VERTICAL GATE FIN-TYPE FIELD EFFECT DIODE
Field effect diode structures utilize a junction structure that has an L-shape in cross-section (a fin extending from a planar portion). An anode is positioned...
2017/0229442 ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICE
A semiconductor device includes a semiconductor substrate and a pair of first well regions formed in the semiconductor substrate, wherein the pair of first...
2017/0229441 Integrated Circuit Cell Library for Multiple Patterning
A method is disclosed for defining a multiple patterned cell layout for use in an integrated circuit design. A layout is defined for a level of a cell in...
2017/0229440 Method and Structure for Semiconductor Mid-End-Of-Line (MEOL) Process
A semiconductor device includes a substrate having first and second regions. The first region includes an insulator and the second region includes source,...
2017/0229438 INTERCONNECT STRUCTURES WITH POLYMER CORE
Embodiments of the present disclosure are directed towards techniques and configurations of interconnect structures having a polymer core in integrated circuit...
2017/0229437 OPTOELECTRONIC COMPONENT DEVICE AND METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT DEVICE
In various exemplary embodiments, an optoelectronic component device is provided. The optoelectronic component device includes a first organic light emitting...
2017/0229436 PACKAGES AND METHODS OF FORMING PACKAGES
Various packages and methods of forming packages are discussed. According to an embodiment, a package includes a processor die at least laterally encapsulated...
2017/0229435 POWER CONVERTER MONOLITHICALLY INTEGRATING TRANSISTORS, CARRIER, AND COMPONENTS
A power converter (100) comprising a semiconductor chip (101) with a first (101a) and a parallel second (101b) surface, and through-silicon vias (TSVs, 110)....
2017/0229434 Semiconductor Device and Method of Manufacture
A semiconductor device and method for providing an enhanced removal of heat from a semiconductor die within an integrated fan out package on package...
2017/0229433 Integrated Fan-Out Structure with Guiding Trenches in Buffer Layer
A bottom package includes a molding compound, a buffer layer over and contacting the molding compound, and a through-via penetrating through the molding...
2017/0229432 Die package with Openings Surrounding End-portions of Through Package Vias (TPVs) and Package on Package (PoP)...
Various embodiments of mechanisms for forming through package vias (TPVs) with openings surrounding end-portions of the TPVs and a package on package (PoP)...
2017/0229431 WAFER LEVEL PACKAGING OF LIGHT EMITTING DIODES (LEDS)
An LED wafer includes LED dies on an LED substrate. The LED wafer and a carrier wafer are joined. The LED wafer that is joined to the carrier wafer is shaped....
2017/0229430 LIGHT EMITTING DEVICE
A light emitting device includes a substrate, micro light emitting chips, reflective structures and conductive bumps. The substrate has pads. The micro light...
2017/0229429 DISPLAY DEVICE AND FABRICATING METHOD
In accordance with various embodiments, the disclosed subject matter provides a display device and a related fabricating method. In some embodiments, the...
2017/0229428 SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
For example, a semiconductor device capable of achieving a high performance applicable to an SR motor is provided. The semiconductor device includes a chip...
2017/0229427 SEMICONDUCTOR MODULE AND STACK ARRANGEMENT OF SEMICONDUCTOR MODULES
A semiconductor module and a stack arrangement of semiconductor modules is proposed. The semiconductor module comprises an insulated gate bipolar transistor, a...
2017/0229426 FAN-OUT BACK-TO-BACK CHIP STACKED PACKAGES AND THE METHOD FOR MANUFACTURING THE SAME
Disclosed is a fan-out back-to-back chip stacked package, comprising a back-to-back stack of a first chip and a second chip, an encapsulant, a plurality of...
2017/0229425 MANUFACTURING METHOD OF WAFER LEVEL PACKAGE STRUCTURE
A manufacturing method of a wafer level package structure includes the following steps. A chip is disposed on a supporting board, wherein the chip includes an...
2017/0229423 METHOD FOR PERMANENTLY BONDING WAFERS
This invention relates to a method for bonding of a first contact surface of a first substrate to a second contact surface of a second substrate with the...
2017/0229422 METHOD OF CONTROLLING BUMP HEIGHT VARIATION
A method of making a semiconductor device includes patterning a photoresist on a substrate to form a plurality of openings in the photoresist. A first opening...
2017/0229421 Semiconductor Devices, Methods of Manufacture Thereof, and Packaged Semiconductor Devices
Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices are disclosed. A method of forming a device includes forming a...
2017/0229420 TECHNIQUES AND CONFIGURATIONS TO CONTROL MOVEMENT AND POSITION OF SURFACE MOUNTED ELECTRICAL DEVICES
Embodiments of the present disclosure are directed towards techniques and configurations to control movement and position of surface mounted electrical...
2017/0229419 Capillary Jig For Wire Bonding And Method Of Installing A Capillary
A jig for holding a wire bonding capillary includes a first arm and an opening in the first arm, wherein a wire bonding capillary is receivable within the...
2017/0229418 SINTERING DEVICE
Sintering device (10) for sintering at least one electronic assembly (BG), having a lower die (20) and an upper die (30) which is slidable towards the lower...
2017/0229417 MOUNTING SUBSTRATE MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING MOUNTING SUBSTRATE
A driver mounting apparatus 40 includes a driver mount-side heat supply support member 42, a substrate support member 41, a driver-side heat supply support...
2017/0229416 Inter-Chip Alignment
First, second, and third integrated devices each include one or more interconnecting structure. Each interconnecting structure includes (i) one or more...
2017/0229415 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING BASE AND SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
In a method of manufacturing a semiconductor device of one embodiment, support members and a film which is formed of a paste containing metal particles and...
2017/0229414 Semiconductor Device and Method
A semiconductor device and method utilizing a dummy structure in association with a redistribution layer is provided. By providing the dummy structure adjacent...
2017/0229413 Method of Manufacturing Connector Structures of Integrated Circuits
A die includes a substrate, a metal pad over the substrate, and a passivation layer covering edge portions of the metal pad. A metal pillar is formed over the...
2017/0229411 ELECTRONIC DEVICE MODULE AND METHOD OF MANUFACTURING THE SAME
The electronic device module includes a sealing part sealing an electronic component therein, and an external connection terminal disposed on one surface of...
2017/0229410 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor substrate, a conductive pad on the semiconductor substrate, and a conductor over the conductive pad. The...
2017/0229409 BONDING FILM
A bonding film has at least a left longitudinal branch, and a lower latitudinal branch; a first bonding area is configured in a first branch, and a second...
2017/0229408 MILLIMETER WAVE INTEGRATED CIRCUIT WITH BALL GRID ARRAY PACKAGE INCLUDING TRANSMIT AND RECEIVE CHANNELS
A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond...
2017/0229407 PACKAGE SUBSTRATE DIFFERENTIAL IMPEDANCE OPTIMIZATION FOR 25 TO 60 GBPS AND BEYOND
Package design method for semiconductor chip package for high speed SerDes signals for optimization of package differential impedance and reduction of package...
2017/0229406 RF Switch on High Resistive Substrate
A device includes a semiconductor substrate of a first conductivity type, and a deep well region in the semiconductor substrate, wherein the deep well region...
2017/0229405 Semiconductor Substrate Having Stress-Absorbing Surface Layer
An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and...
2017/0229404 Package Structure and Method for Forming the Same
A package structure and method for forming the same are provided. The package structure includes a substrate and a semiconductor die formed over the substrate....
2017/0229403 Methods of Manufacturing An Integrated Circuit Having Stress Tuning Layer
Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of...
2017/0229402 DOUBLE SIDE VIA LAST METHOD FOR DOUBLE EMBEDDED PATTERNED SUBSTRATE
An interposer substrate includes a first circuit pattern embedded at a first surface of a dielectric layer and a second circuit pattern embedded at a second...
2017/0229401 Packages with Interposers and Methods for Forming the Same
A package structure includes an interposer, a die over and bonded to the interposer, and a Printed Circuit Board (PCB) underlying and bonded to the interposer....
2017/0229400 SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICE INCLUDING AN ELECTROMAGNETIC WAVE SHIELDING MEMBER
A semiconductor package includes a semiconductor chip mounted on a substrate. The semiconductor package further includes an electromagnetic wave shielding...
2017/0229399 Method of galvanic plating assisted by a current distribution layer
The method comprises providing a plurality of electronic devices, embedding the electronic devices in an encapsulation layer, forming vias into the...
2017/0229398 LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE COMPRISING LIGHT EMITTING DEVICE, AND LIGHT EMITTING...
A light emitting device according to an embodiment includes a substrate; first to Mth light emitting cells (where M is a positive integer of two or more) which...
2017/0229397 NOVEL PATTERNING APPROACH FOR IMPROVED VIA LANDING PROFILE
The present disclosure is directed to a semiconductor structure that includes a semiconductor substrate. A first interconnect layer is disposed over the...
2017/0229396 SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a substrate and an interconnect...
2017/0229395 FUSE STRUCTURE HAVING MULTIPLE AIR DUMMY FUSES
A fuse structure includes a fusing line including a first portion, a second portion, and a central portion between the first portion and the second portion;...
2017/0229394 METHOD AND STRUCTURE FOR FORMING ON-CHIP ANTI-FUSE WITH REDUCED BREAKDOWN VOLTAGE
A fully depleted field effect transistor (FET) and an anti-fuse structure are provided on a same chip. The fully depleted FET and the anti-fuse structure share...
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