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Patent # Description
2017/0229339 SHALLOW TRENCH ISOLATION TRENCHES AND METHODS FOR NAND MEMORY
A NAND memory is provided that includes a memory cell region and a peripheral region. The peripheral region includes a shallow trench isolation trench disposed...
2017/0229338 METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Using an STI insulating film in a high breakdown voltage MOSFET leads to deterioration in reliability due to impact ionization near the bottom corner of a...
2017/0229337 SYSTEMS AND METHODS FOR CREATING AIRGAP SEALS USING ATOMIC LAYER DEPOSITION AND HIGH DENSITY PLASMA CHEMICAL...
A method for processing a substrate to create an air gap includes a) providing a substrate including a first trench and a second trench; b) depositing a...
2017/0229336 RECEPTACLE DEVICE, DEVICE AND METHOD FOR HANDLING SUBSTRATE STACKS
The invention relates to a retaining system for handling substrate stacks, including a retaining surface for retaining a first substrate, and one or more...
2017/0229335 ELECTROSTATIC CHUCK DEVICE
An electrostatic chuck device 80 includes: an electrostatic chuck section 2 having one principal surface serving as a placing surface on which a plate-shaped...
2017/0229334 SUBSTRATE SUPPORT CHUCK COOLING FOR DEPOSITION CHAMBER
A substrate support chuck for use in a substrate processing system is provided herein. In some embodiments, a substrate support for use in a substrate...
2017/0229333 Article Transport Facility
A controller performs a stop control if a first detector detects that an article transport vehicle traveling in a first path entered a managed area, and a...
2017/0229332 PLASMA STABILITY DETERMINING METHOD AND PLASMA PROCESSING APPARATUS
A method and apparatus for determining a stability of plasma in a plasma processing apparatus for performing a plasma processing by converting into plasma a...
2017/0229331 TEMPERATURE SENSING SYSTEM FOR ROTATABLE WAFER SUPPORT ASSEMBLY
A semiconductor processing apparatus includes a wafer support assembly, a temperature sensor integrated in the wafer support assembly for measuring a...
2017/0229330 DIRECTED SELF-ASSEMBLY OF ELECTRONIC COMPONENTS USING DIAMAGNETIC LEVITATION
Embodiments of the invention relate generally to directed self-assembly (DSA) and, more particularly, to the DSA of electronic components using diamagnetic...
2017/0229329 THERMAL MANAGEMENT SYSTEMS AND METHODS FOR WAFER PROCESSING SYSTEMS
A workpiece holder includes a puck having a cylindrical axis, a radius about the cylindrical axis, and a thickness. At least a top surface of the puck is...
2017/0229328 BOLTED WAFER CHUCK THERMAL MANAGEMENT SYSTEMS AND METHODS FOR WAFER PROCESSING SYSTEMS
A workpiece holder includes a puck, first and second heating devices in thermal communication with respective inner and outer portions of the puck, and a...
2017/0229327 SUBSTRATE SUPPORTS WITH MULTI-LAYER STRUCTURE INCLUDING INDEPENDENT OPERATED HEATER ZONES
A substrate support is provided, is configured to support a substrate in a plasma processing chamber, and includes first, second and third insulative layers,...
2017/0229325 PROCESS CHAMBER FOR ETCHING LOW K AND OTHER DIELECTRIC FILMS
Methods and process chambers for etching of low-k and other dielectric films are described. For example, a method includes modifying portions of the low-k...
2017/0229324 SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING APPARATUS ASSEMBLING METHOD
A substrate processing system includes multiple assemblies framed and including such that each of the assemblies includes a substrate processing apparatus...
2017/0229323 WATER DISCHARGE SYSTEM, WATER DISCHARGE METHOD, WATER DISCHARGE CONTROL APPARATUS, WATER DISCHARGE CONTROL...
A water discharge system for a substrate processing apparatus comprising a substrate processor that processes a substrate using liquid, includes: at least two...
2017/0229322 INTEGRATED PASSIVE DEVICE PACKAGE AND METHODS OF FORMING SAME
An embodiment device package includes a first die, a second die, and a molding compound extending along sidewalls of the first die and the second die. The...
2017/0229321 HYBRID ELECTRONIC DEVICE PROTECTED AGAINST HUMIDITY AND METHOD OF PROTECTING A HYBRID ELECTRONIC DEVICE AGAINST...
This method concerns the protection against humidity of a device including a first and a second electronic components respectively having two opposite...
2017/0229320 PRODUCING METHOD OF POWER-MODULE SUBSTRATE
To prevent braze stain and improve solder bondability of a semiconductor chip without deteriorating bondability between a metal plate and a ceramic substrate:...
2017/0229319 FABRICATION METHOD OF PACKAGE STRUCTURE
A method for fabricating a package structure is provided, which includes the steps of: forming a first insulating layer on a carrier; forming a dielectric body...
2017/0229318 METHOD FOR PRODUCING GLASS SUBSTRATE AND GLASS SHEET
A method for producing a glass substrate according to the present invention includes the steps of: (I) forming a through hole (11) in a glass sheet (10); (II)...
2017/0229317 CHAMBER FOR PATTERNING NON-VOLATILE METALS
Apparatuses suitable for etching substrates at various pressure regimes are described herein. Apparatuses include a process chamber including a movable...
2017/0229316 NITROGEN-CONTAINING COMPOUNDS FOR ETCHING SEMICONDUCTOR STRUCTURES
A method for etching silicon-containing films is disclosed. The method includes the steps of introducing a vapor of a nitrogen containing etching compound into...
2017/0229315 INTEGRATED LAYER ETCH SYSTEM WITH MULTIPLE TYPE CHAMBERS
Embodiments described herein generally relate to a substrate processing system, such as an etch processing system. In one embodiment, a substrate processing...
2017/0229314 ATOMIC LAYER ETCHING 3D STRUCTURES: SI AND SIGE AND GE SMOOTHNESS ON HORIZONTAL AND VERTICAL SURFACES
Methods and apparatuses for etching semiconductor material on substrates using atomic layer etching by chemisorption, by deposition, or by both chemisorption...
2017/0229313 METHODS FOR SELECTIVE ETCHING OF A SILICON MATERIAL
The present disclosure provides methods for etching features in a silicon material includes performing a remote plasma process formed from an etching gas...
2017/0229312 METHOD OF PLASMA ETCHING AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME
Disclosed are a method of plasma etching and a method of fabricating a semiconductor device including the same. The method of plasma etching includes loading a...
2017/0229311 ATOMIC LAYER ETCHING IN CONTINUOUS PLASMA
Methods and apparatus for etching substrates using self-limiting reactions based on removal energy thresholds determined by evaluating the material to be...
2017/0229310 FIN PROFILE IMPROVEMENT FOR HIGH PERFORMANCE TRANSISTOR
A finFET semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a first fin formed in a first...
2017/0229309 FLOW DISTRIBUTION PLATE FOR SURFACE FLUORINE REDUCTION
A method and apparatus for processing a semiconductor substrate are described herein. A process system described herein includes a plasma source and a flow...
2017/0229308 MRAM DRY ETCHING RESIDUE REMOVAL COMPOSITION, METHOD OF PRODUCING MAGNETORESISTIVE RANDOM ACCESS MEMORY, AND...
An object is to provide an MRAM dry etching residue removal composition capable of removing dry etching residues while suppressing damage to a substrate...
2017/0229307 LASER ANNEALING DEVICE AND LASER ANNEALING METHOD
A laser annealing device includes a laser beam source, a laser beam irradiating optical system that irradiates a treatment area of a treatment object substrate...
2017/0229306 Vertical Thyristor Memory with Minority Carrier Lifetime Reduction
Apparatus and methods for reducing minority carriers in a memory array are described herein. Minority carriers diffuse between ON cells and OFF cells, causing...
2017/0229305 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A trench has first to third side surfaces respectively constituted of first to third semiconductor layers. A first side wall portion included in a first...
2017/0229304 STRAIN RELAXED BUFFER LAYERS WITH VIRTUALLY DEFECT FREE REGIONS
A strain relaxed buffer layer of a second semiconductor material and of a second lattice constant and containing misfit dislocation defects and threading...
2017/0229303 METHOD FOR REMOVING NATIVE OXIDE AND RESIDUE FROM A III-V GROUP CONTAINING SURFACE
Native oxides and residue are removed from surfaces of a substrate by performing a multiple-stage native oxide cleaning process. In one example, the method for...
2017/0229302 SEMICONDUCTOR CHIP CARRIERS WITH MONOLITHICALLY INTEGRATED QUANTUM DOT DEVICES AND METHOD OF MANUFACTURE THEREOF
A three-dimensional polycrystalline semiconductor material provides a major ingredient forming individual crystalline grains having a nominal maximum grain...
2017/0229301 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer...
2017/0229300 IMPRINT APPARATUS, IMPRINT METHOD, AND PATTERN FORMING METHOD
An imprint apparatus includes a template holder configured to hold a template that has a pattern formed thereon, the pattern to be transferred to a substrate...
2017/0229299 APPARATUS AND METHOD FOR SAMPLING OF CONFINED SPACES
In various embodiments of the invention, a cargo container can be monitored at appropriate time intervals to determine that no controlled substances have been...
2017/0229298 LATERAL INTRODUCTION OF IONS INTO RF ION GUIDES
An ion guide system includes an ion guide with pole rods, a device for laterally introducing an ion species, and a mass spectrometer for analyzing product ions...
2017/0229297 Intelligent Dynamic Range Enhancement
A method of mass spectrometry is disclosed comprising transmitting ions and obtaining first mass spectral data and automatically determining during an...
2017/0229296 TARGET ASSEMBLY
A target assembly is provided which is capable of preventing abnormal discharging from being generated between a projected portion of a backing plate and a...
2017/0229295 SPUTTERING DEVICE COMPONENT WITH MODIFIED SURFACE AND METHOD OF MAKING
A sputtering target assembly for use in a vapor deposition apparatus, the sputtering target assembly comprising a sputtering surface; a sidewall extending from...
2017/0229294 FILTER APPARATUS FOR ARC ION EVAPORATOR USED IN CATHODIC ARC PLASMA DEPOSITION SYSTEM
A filter apparatus for arc ion evaporator used in the cathodic arc plasma deposition system according to this invention is characterized by a set of multiple...
2017/0229293 SYSTEMS AND METHODS FOR INTERNAL SURFACE CONDITIONING IN PLASMA PROCESSING EQUIPMENT
A method of conditioning internal surfaces of a plasma source includes flowing first source gases into a plasma generation cavity of the plasma source that is...
2017/0229292 PLASMA CHEMICAL VAPOR DEPOSITION DEVICE
A plasma chemical vapor deposition device includes an adhesion suppressing sheet suppressing a processing gas from adhering to an inner wall of a reactor. The...
2017/0229291 METHODS AND SYSTEMS TO ENHANCE PROCESS UNIFORMITY
A semiconductor processing chamber may include a remote plasma region, and a processing region fluidly coupled with the remote plasma region. The processing...
2017/0229290 VACUUM PROCESSING APPARATUS
In a vacuum processing apparatus including: a vacuum container including a processing chamber therein; a plasma formation chamber; plate members being arranged...
2017/0229289 SEMICONDUCTOR PROCESSING SYSTEMS HAVING MULTIPLE PLASMA CONFIGURATIONS
An exemplary system may include a chamber configured to contain a semiconductor substrate in a processing region of the chamber. The system may include a first...
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