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Patent # Description
2017/0243986 SOLAR PANEL
A high efficiency configuration for a solar cell module comprises solar cells arranged in an overlapping shingled manner and conductively bonded to each other...
2017/0243985 VERTICAL PIN DIODE
A vertical positive-intrinsic-negative (pin) diode includes a semiconductor substrate in which a P-type region, an intrinsic region, and an N-type region are...
2017/0243984 SEMICONDUCTOR DEVICE COMPRISING A DIODE AND ELECTROSTATIC DISCHARGE PROTECTION DEVICE
A semiconductor device comprising at least two holes (18, 20) realised in a substrate (6), having each a width and a depth, and forming a diode (4), wherein...
2017/0243983 MULTIPLE STATE ELECTROSTATICALLY FORMED NANOWIRE TRANSISTORS
A transistor (100), including a planar semiconducting substrate (36), a source (42) formed on the substrate, a first drain (102) formed on the substrate, and a...
2017/0243982 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor device includes a semiconductor substrate including a main surface, an element separation film formed over the main surface, and a fin...
2017/0243981 Semiconductor Device
Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or...
2017/0243980 THIN FILM TRANSISTOR AND MOS FIELD EFFECT TRANSISTOR THAT INCLUDE HYDROPHILIC/HYDROPHOBIC MATERIAL, AND METHODS...
The thin film transistor includes a first insulating layer provided on a substrate; a source electrode and a drain electrode that are provided on the first...
2017/0243979 ARRAY SUBSTRATE AND DISPLAY DEVICE
An array substrate and a display device are provided. A gate insulating layer and a gate electrode are formed on a semiconductor layer in sequence, the gate...
2017/0243978 OXIDE SEMICONDUCTOR TRANSISTOR
An oxide semiconductor transistor according to an exemplary embodiment of the present invention includes: a substrate; a first gate electrode disposed on the...
2017/0243977 FINFET STRUCTURE DEVICE
The present invention provides a FinFET device, including at least one fin structure, wherein the fin structure has a first-type well region, and a second-type...
2017/0243976 Semiconductor Device and Method of Forming the Same
A semiconductor device includes a substrate, at least one semiconductor fin, and at least one epitaxy structure. The semiconductor fin is present on the...
2017/0243975 DOPING PROFILE FOR STRAINED SOURCE/DRAIN REGION
The present disclosure relates to a transistor device having a strained source/drain region. In some embodiments, the transistor device has a gate structure...
2017/0243974 VERTICAL FIELD EFFECT TRANSISTORS WITH PROTECTIVE FIN LINER DURING BOTTOM SPACER RECESS ETCH
A method of fabricating a vertical field effect transistor comprising that includes forming openings through a spacer material to provide fin structure...
2017/0243973 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device including a semiconductor substrate including a trench, the semiconductor substrate having a crystal structure; and an insulating layer...
2017/0243972 SEMICONDUCTOR DEVICE INCLUDING A PIPE CHANNEL LAYER HAVING A PROTRUDING PORTION
Disclosed is a semiconductor device, including: a first pipe gate; a second pipe gate on the first pipe gate; a stacked structure on the second pipe gate; a...
2017/0243971 SEMICONDUCTOR DEVICE
According to one embodiment, the gate insulating film is provided on a semiconductor region including the body region and the drift region between the source...
2017/0243970 SILICON CARBIDE DEVICE AND METHOD OF MAKING THEREOF
Embodiments of a silicon carbide (SiC) device are provided herein. In some embodiments, a silicon carbide (SiC) device may include a gate electrode disposed...
2017/0243969 Semiconductor Device with Cell Trench Structures and Contacts and Method of Manufacturing a Semiconductor Device
First and second cell trench structures extend from a first surface into a semiconductor substrate. The first cell trench structure includes a first buried...
2017/0243968 AIRGAP SPACERS
Semiconductor devices with airgap spacers and methods of forming the same include forming a lower spacer that defines a gate region. A sacrificial upper spacer...
2017/0243967 ELECTRONIC DEVICE INCLUDING TWO-DIMENSIONAL ELECTRON GAS AND METHOD OF FABRICATING THE SAME
An electronic device including a two-dimensional electron gas is provided. The electronic device includes a substrate, a first material layer disposed on the...
2017/0243966 PHASE CONTROL THYRISTOR
A thyristor, in particular a phase control thyristor, is disclosed with comprises: a) a semiconductor slab, in particular a semiconductor wave or die, in which...
2017/0243965 BI-DIRECTIONAL PUNCH-THROUGH SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In one embodiment, a bi-directional punch-through semiconductor device can include: a first transistor in a first region of a semiconductor substrate of a...
2017/0243964 SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor substrate; a main electrode; a peripheral electrode; an insulating protective film; a surface metallic layer;...
2017/0243963 Producing a Semiconductor Device by Epitaxial Growth
A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing,...
2017/0243962 RB-IGBT
An RB-IGBT is provided that has a new emitter trench structure with improved breakdown voltage achieved by improving the electrical field distribution of the...
2017/0243961 VERTICAL TUNNEL FIELD EFFECT TRANSISTOR (FET)
Among other things, one or more techniques for forming a vertical tunnel field effect transistor (FET), and a resulting vertical tunnel FET are provided...
2017/0243960 COMPLEMENTARY TUNNELING FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREFOR
A complementary tunneling field effect transistor and a manufacturing method are disclosed, which includes: a first drain region and a first source region that...
2017/0243959 METHOD AND STRUCTURE FOR FORMING DIELECTRIC ISOLATED FINFET WITH IMPROVED SOURCE/DRAIN EPITAXY
Described herein is a FinFET device in which epitaxial layers of semiconductor material are formed in the source/drain regions on dielectrically isolated fin...
2017/0243958 METHOD TO IMPROVE GE CHANNEL INTERFACIAL LAYER QUALITY FOR CMOS FINFET
A method for manufacturing a semiconductor device includes providing a semiconductor structure having a substrate structure, multiple fins having a germanium...
2017/0243957 SEMICONDUCTOR DEVICE INCLUDING FIN FET AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a fin structure for a fin field effect transistor (FET). The fin structure includes a base layer protruding from a substrate,...
2017/0243956 FIN CUT FOR TAPER DEVICE
A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etch to remove a portion of the fin to cut the fin into...
2017/0243955 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Provided is a stable manufacturing method for a semiconductor device. In the manufacturing method for a semiconductor device, first, fins with an equal width...
2017/0243954 METHOD OF FABRICATING FINFET DEVICE
A method of forming a FinFET device includes following steps. First of all, a fin shaped structure is formed on a substrate. Then, a portion of the fin shaped...
2017/0243953 METHOD FOR MANUFACTURING HIGH-PERFORMANCE AND LOW-POWER FIELD EFFECT TRANSISTOR OF WHICH SURFACE ROUGHNESS...
Aspects of the present invention relate to a method for manufacturing a high-performance and low-power field effect transistor (FET) element of which surface...
2017/0243952 METHOD FOR MANUFACTURING TRANSISTOR WITH SICN/SIOCN MULTILAYER SPACER
A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, agate...
2017/0243951 POWER DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided are a power device having an improved field stop layer and a method of manufacturing the same. The method can include performing a first ion implant...
2017/0243950 METHOD OF FABRICATING A TRANSISTOR WITH REDUCED HOT CARRIER INJECTION EFFECTS
A method of fabricating a transistor with reduced hot carrier injection effects includes providing a substrate covered by a gate material layer. Later, the...
2017/0243948 METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE
A method for manufacturing a silicon carbide semiconductor device includes preparing a silicon carbide layer including an n-type region having an n...
2017/0243947 DUAL METAL INTERCONNECT STRUCTURE
Source/drain contact structures that exhibit low contact resistance and improved electromigration properties are provided. After forming a first contact...
2017/0243946 GATE STRUCTURE WITH MULTIPLE SPACERS
Semiconductor structures are provided. The semiconductor structure includes a substrate and a floating gate structure formed over the substrate. The...
2017/0243945 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
In a semiconductor memory device, first insulating films are arranged along a first direction and a second direction and extend in a third direction....
2017/0243944 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In a method of manufacturing a semiconductor device, a first fin structure for an n-channel fin field effect transistor (FinFET) is formed over a substrate. An...
2017/0243943 THIN FILM TRANSISTOR FABRICATION UTLIZING AN INTERFACE LAYER ON A METAL ELECTRODE LAYER
Embodiments of the disclosure generally provide methods of forming thin film transistor (TFT) device structure with good interface management between a metal...
2017/0243942 SEMICONDUCTOR DEVICES INCLUDING FIELD EFFECT TRANSISTORS AND METHODS OF FORMING THE SAME
A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a...
2017/0243941 FINFET Structures and Methods of Forming the Same
FinFETs and methods of forming finFETs are described. According to some embodiments, a structure includes a channel region, first and second source/drain...
2017/0243940 Semiconductor Devices and Methods for Forming a Semiconductor Device
A method for forming a semiconductor device includes incorporating dopants of a first conductivity type into a nearby body region portion of a semiconductor...
2017/0243939 HETEROJUNCTION BIPOLAR TRANSISTOR
A high-performance HBT that is unlikely to decrease the process controllability and to increase the manufacturing cost is implemented. A heterojunction bipolar...
2017/0243938 Semiconductor Wafer and Method of Manufacturing Semiconductor Devices in a Semiconductor Wafer
A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An...
2017/0243937 HIGH VOLTAGE SEMICONDUCTOR DEVICES
We disclose a high voltage semiconductor device comprising a semiconductor substrate of a second conductivity type; a semiconductor drift region of the second...
2017/0243936 Vertical Potential Short in the Periphery Region of a III-Nitride Stack for Preventing Lateral Leakage
A semiconductor die includes a substrate and a semiconductor body supported by the substrate and having a periphery which is devoid of active devices and...
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