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Patent # Description
2017/0263795 METHOD OF FABRICATING AN EMITTER REGION OF A SOLAR CELL
Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are...
2017/0263794 MATERIALS, STRUCTURES, AND METHODS FOR OPTICAL AND ELECTRICAL III-NITRIDE SEMICONDUCTOR DEVICES
The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for...
2017/0263793 PHOTODETECTOR AND OBJECT DETECTION SYSTEM USING THE SAME
A photodetector according to an embodiment includes: a semiconductor substrate including a first region and a second region adjacent to the first region; at...
2017/0263792 SOLAR CELLS PROVIDED WITH COLOR MODULATION AND METHOD FOR FABRICATING THE SAME
Solar cells provided with color modulation and a method for fabricating the same are disclosed. The solar cell includes a photoelectric conversion layer and a...
2017/0263791 SOLAR CELL AND MANUFACTURING METHOD OF SOLAR CELL
The present invention is a solar cell comprising a gallium-doped silicon substrate having a p-n junction formed therein, wherein the silicon substrate is...
2017/0263790 NANO-ELECTRODE MULTI-WELL HIGH-GAIN AVALANCHE RUSHING PHOTOCONDUCTOR
Provided is a detector that includes a scintillator, a common electrode, a pixel electrode, and a plurality of insulating layers, with a plurality of...
2017/0263789 DESICCANT-BASED COOLING OF PHOTOVOLTAIC MODULES
An example device includes a photovoltaic (PV) unit and a desiccant-based passive cooling component that is thermally coupled to the PV unit. The ...
2017/0263788 HIGHLY RESPONSIVE III-V PHOTODETECTORS USING ZnO:Al AS N-TYPE EMITTER
A photodiode includes a p-type ohmic contact and a p-type substrate in contact with the p-type ohmic contact. An intrinsic layer is formed over the substrate...
2017/0263787 PHOTOVOLTAIC MODULE WITH FLEXIBLE CIRCUIT
A photovoltaic module, and method of making, is disclosed in which a flexible circuit is electrically coupled to a plurality of photovoltaic cells, where the...
2017/0263786 OXIDE SEMICONDUCTOR SUBSTRATE AND SCHOTTKY BARRIER DIODE
A schottky barrier diode element having a silicon (Si) substrate, an oxide semiconductor layer and a schottky electrode layer, wherein the oxide semiconductor...
2017/0263785 SEMICONDUCTOR DEVICE
A p type anode layer is formed on a front surface of an n type drift layer in an active region. An n type buffer layer is formed on a rear surface of the...
2017/0263784 DIODE WITH REDUCED RECOVERY TIME FOR APPLICATIONS SUBJECT TO THE CURRENT RECIRCULATION PHENOMENON AND/OR TO...
A diode comprising a semiconductor body delimited by a front surface and including: a first semiconductor region having a first type of conductivity, facing at...
2017/0263783 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE
To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. Provided is a semiconductor device including an oxide...
2017/0263782 TRANSISTOR AND ELECTRONIC DEVICE
A transistor capable of high-speed operation is provided. In a transistor including a back gate electrode, the back gate electrode is provided over a back gate...
2017/0263781 VERTICAL TRANSISTOR FABRICATION AND DEVICES
A method of fabricating a vertical field effect transistor including forming a first recess in a substrate; epitaxially growing a first drain from the first...
2017/0263780 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a nonvolatile semiconductor memory device includes first and second gate electrode layers, an inter-layer insulating layer, a...
2017/0263779 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a non-volatile semiconductor memory device includes: a tunnel insulation film provided on a semiconductor substrate; a floating...
2017/0263778 FLASH MEMORY STRUCTURE AND FABRICATION METHOD THEREOF
A method is provided for fabricating a flash memory structure. The method includes providing a substrate; and forming a gate structure and a hard mask layer....
2017/0263776 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE INCLUDING THE SAME
A change in electrical characteristics in a semiconductor device including an oxide semiconductor film is inhibited, and the reliability is improved. The...
2017/0263775 SEMICONDUCTOR DEVICE
High field-effect mobility is provided for a semiconductor device including an oxide semiconductor. Further, a highly reliable semiconductor device including...
2017/0263774 SEMICONDUCTOR DEVICE
A transistor having favorable electrical characteristics. A transistor suitable for miniaturization. A transistor having a high switching speed. One embodiment...
2017/0263773 COMPOSITE AND TRANSISTOR
A novel material is provided. A composite oxide semiconductor in which a first region and a plurality of second regions are mixed is provided. Note that the...
2017/0263772 SEMICONDUCTOR DEVICE STRAIN RELAXATION BUFFER LAYER
A method for forming a semiconductor device comprises forming a first buffer layer with a first melting point on a substrate. A second buffer layer is formed...
2017/0263771 MOS Devices Having Epitaxy Regions with Reduced Facets
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the...
2017/0263770 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
A semiconductor device includes a first source region, a second source region, and a drain region. The first source region includes a first conductivity type...
2017/0263769 III-NITRIDE TRANSISTOR WITH ENHANCED DOPING IN BASE LAYER
A vertical trench MOSFET comprising: a N-doped substrate of a III-N material; and an epitaxial layer of the III-N material grown on a top surface of the...
2017/0263768 SEMICONDUCTOR DEVICE
A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third...
2017/0263767 SEMICONDUCTOR DEVICE
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type on the...
2017/0263766 LDMOS TRANSISTORS INCLUDING RESURF LAYERS AND STEPPED-GATES, AND ASSOCIATED SYSTEMS AND METHODS
A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor includes a silicon semiconductor structure including (a) a base layer, (b)...
2017/0263765 DRIFT-REGION FIELD CONTROL OF AN LDMOS TRANSISTOR USING BIASED SHALLOW-TRENCH FIELD PLATES
Apparatus and associated methods relate to controlling an electric field profile within a drift region of an LDMOS device using biased field plates to deplete...
2017/0263764 SEMICONDUCTOR DEVICE CAPABLE OF HIGH-VOLTAGE OPERATION
A semiconductor device capable of high-voltage operation includes a semiconductor substrate, a first well region, a second well region, a first gate structure,...
2017/0263763 SEMICONDUCTOR DEVICE
The present examples relate to a semiconductor device used in an electric device or high voltage device. The present examples improve R.sub.sp by minimizing...
2017/0263762 LOW-COST SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Provided are a low-cost semiconductor device manufacturing method and a semiconductor device made using the method. The method includes forming multiple body...
2017/0263761 SEMICONDUCTOR DEVICE CAPABLE OF HIGH-VOLTAGE OPERATION
A semiconductor device capable of high-voltage operation includes a semiconductor substrate having a first conductivity type. A first well doped region is...
2017/0263760 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes a semiconductor device includes a first semiconductor region, a second semiconductor region, a...
2017/0263759 LDMOS TRANSISTOR WITH LIGHTLY-DOPED ANNULAR RESURF PERIPHERY
Apparatus and associated methods relate to controlling an electric field profile within a drift region of an LDMOS device using first and second RESURF...
2017/0263758 VERTICAL CONDUCTION INTEGRATED ELECTRONIC DEVICE PROTECTED AGAINST THE LATCH-UP AND RELATING MANUFACTURING PROCESS
A vertical conduction integrated electronic device including: a semiconductor body; a trench that extends through part of the semiconductor body and delimits a...
2017/0263757 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A silicon carbide semiconductor device includes: a substrate; a drift layer over the substrate; a base region over the drift layer; multiple source regions...
2017/0263756 Semiconductor Devices and a Method for Forming a Semiconductor Device
A semiconductor device includes a plurality of striped-shaped trenches extending into a semiconductor substrate. At least one trench of a first group of...
2017/0263755 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An n-channel power MOS transistor having a gate electrode is formed in an element formation region defined in a semiconductor substrate. A p-type guard ring...
2017/0263754 SWITCHING DEVICE
A switching device including a semiconductor substrate including a trench (gate electrode) extending in a mesh shape is provided, and the upper surface of the...
2017/0263753 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
To provide a semiconductor device less affected by noise without making a manufacturing process more complicated and increasing a chip area. The device has a...
2017/0263752 SEMICONDUCTOR DEVICE
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type on the...
2017/0263751 Method of Forming FinFET Gate Oxide
A semiconductor device includes a semiconductor fin, a first silicon nitride based layer, a lining oxide layer, a second silicon nitride based layer and a gate...
2017/0263750 FINFET TRANSISTOR
A semiconductor device includes a semiconductor substrate having isolation regions formed therein and a fin-shaped semiconductor structure protruding...
2017/0263749 Integrated Circuit Transistor Structure with High Germanium Concentration SiGe Stressor
An embodiment of a method for forming a transistor that includes providing a semiconductor substrate having a source/drain region is provided where a first...
2017/0263748 METHODS TO ACHIEVE STRAINED CHANNEL FINFET DEVICES
Methods to achieve strained channel finFET devices and resulting finFET devices are presented. In an embodiment, a method for processing a field effect...
2017/0263747 SEMICONDUCTOR DEVICE
A semiconductor device includes a first conductivity type first semiconductor region, a second conductivity type second semiconductor region, a second...
2017/0263746 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
To restrict alloy formation between a hydrogen-absorbing layer of titanium or the like and an electrode of aluminum or the like, provided is a semiconductor...
2017/0263745 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes: an n.sup.+-type drain region made of a wide-bandgap semiconductor material; an n-type epitaxial layer provided on the top...
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