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Patent # Description
2017/0263541 MITIGATION OF WHISKER GROWTH IN TIN COATINGS BY ALLOYING WITH INDIUM
A method comprising incorporating indium into an entire Sn film for preventing the growth of whiskers from the Sn film, wherein the Sn film is applied to a...
2017/0263540 STACKED CHIP-ON-BOARD MODULE WITH EDGE CONNECTOR
A module can include a module card and first and second microelectronic elements having front surfaces facing a first surface of the module card. The module...
2017/0263539 POWER OVERLAY STRUCTURE AND METHOD OF MAKING SAME
A power overlay (POL) structure includes a POL sub-module. The POL sub-module includes a dielectric layer and a semiconductor device having a top surface...
2017/0263538 PACKAGED SEMICONDUCTOR DEVICE HAVING BENT LEADS AND METHOD FOR FORMING
A package device has a first lead frame having a first flag. A first integrated circuit is on the first flag. A first encapsulant is over the first integrated...
2017/0263537 SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
A semiconductor package includes a die pad; a plurality of external connection terminals located around the die pad; a semiconductor chip located on a top...
2017/0263536 CHIP PACKAGE HAVING TILTED THROUGH SILICON VIA
A chip package includes at least one integrated circuit die. The integrated circuit die includes a substrate portion having an internal plane between a front...
2017/0263535 SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE
A semiconductor device including a semiconductor module 10A, a semiconductor module 10B that has a lower switching voltage threshold than the semiconductor...
2017/0263534 HEAT SINK FOR COOLING OF POWER SEMICONDUCTOR MODULES
A heat sink for cooling at least one power semiconductor module, and that includes a basin for containing a cooling liquid. The basin has a contact rim for...
2017/0263533 POWER SEMICONDUCTOR MODULE, FLOW PATH MEMBER, AND POWER-SEMICONDUCTOR-MODULE STRUCTURE
The invention is provided with a metal base plate including a first surface and a second surface and a cooling case including a bottom wall and a side wall...
2017/0263532 POWER ELECTRONICS ASSEMBLIES HAVING A SEMICONDUCTOR COOLING CHIP AND AN INTEGRATED FLUID CHANNEL SYSTEM
A power electronics assembly includes a semiconductor device stack having a wide bandgap semiconductor device, a semiconductor cooling chip thermally coupled...
2017/0263531 POWER ELECTRONICS ASSEMBLIES HAVING A WIDE BANDGAP SEMICONDUCTOR DEVICE AND AN INTEGRATED FLUID CHANNEL SYSTEM
A power electronics assembly having a semiconductor device stack having a wide bandgap semiconductor device, a first electrode electrically coupled the wide...
2017/0263530 ENCAPSULATED POWER SEMICONDUCTOR DEVICE HAVING A METAL MOULDED BODY AS A FIRST CONNECTING CONDUCTOR
A power semiconductor device has a metal moulded body forming a first connecting conductor, with a first main surface of the metal moulded body there is a...
2017/0263529 THICK-SILVER LAYER INTERFACE
A semiconductor device and a method of manufacturing the same include a die and a planar thermal layer, and a thick-silver layer having a thickness of at least...
2017/0263528 SEMICONDUCTOR DEVICE
Certain embodiments provide a semiconductor device of an example including a semiconductor substrate, a semiconductor layer provided on the semiconductor...
2017/0263527 SEMICONDUCTOR MODULE
A semiconductor module comprises a semiconductor device; a substrate, on which the semiconductor device is attached; a molded encasing, into which the...
2017/0263526 ELEMENT CHIP AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing an element chip includes a protection film etching step of removing a part of the protection film which is stacked on the dividing...
2017/0263525 ELEMENT CHIP AND METHOD FOR MANUFACTURING THE SAME
A method of manufacturing an element chip includes an isotropic etching step of removing the first damaged region and the second damaged region through etching...
2017/0263524 ELEMENT CHIP AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing an element chip includes a protection film stacking step of staking a protection film to the element region, and the dividing...
2017/0263523 WAFER-LEVEL CHIP-SIZE PACKAGE WITH REDISTRIBUTION LAYER
A wafer-level chip-size package includes a semiconductor structure. A bonding pad is formed over the semiconductor structure, including a plurality of...
2017/0263522 ELECTRONIC COMPONENT PACKAGE AND METHOD OF MANUFACTURING THE SAME
An electronic component package includes a frame, an electronic component, an encapsulant, a metal layer, and a redistribution layer. The frame has a through...
2017/0263521 RESIN-ENCAPSULATED SEMICONDUCTOR DEVICE
A first resin encapsulated body and a second resin encapsulated body are stacked to form a resin-encapsulated semiconductor device. The first resin...
2017/0263520 SEMICONDUCTOR DEVICE HAVING ELECTRODE PADS ARRANGED BETWEEN GROUPS OF EXTERNAL ELECTRODES
The semiconductor device has the CSP structure, and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to...
2017/0263519 3D STACKED-CHIP PACKAGE
Disclosed herein is a package comprising a first die having a first redistribution layer (RDL) disposed on a first side of a first substrate and a second die...
2017/0263518 Integrated Fan-Out Package Including Voltage Regulators and Methods Forming Same
A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and...
2017/0263517 METHOD FOR FORMING AN ELECTRICAL DEVICE AND ELECTRICAL DEVICES
A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at...
2017/0263516 Semiconductor Device, and Alternator and Power Converter Using the Semiconductor Device
Provided is a semiconductor device including: a first external electrode which includes a circular outer peripheral portion; a MOSFET chip; a control circuit...
2017/0263515 SEAL FOR SEMICONDUCTOR PACKAGE
Semiconductor packages and methods of manufacturing semiconductor packages are described herein. In certain embodiments, the semiconductor package includes a...
2017/0263514 METHOD OF FORMING A TEMPORARY TEST STRUCTURE FOR DEVICE FABRICATION
A method of forming a temporary test structure for device fabrication is provided. The method allows for electrically testing conductive interconnects during...
2017/0263513 SOLID-STATE IMAGING DEVICE AND METHOD FOR PRODUCING THE SAME
A solid-state imaging device includes a substrate having a rectangular shape; a first region configured to extend on the substrate in a length direction of the...
2017/0263512 CONTROL DEVICE AND CONTROL METHOD OF SEMICONDUCTOR MANUFACTURING APPARATUS
A control device of a semiconductor manufacturing apparatus includes a processor and a memory connected to the processor and storing instructions executable by...
2017/0263511 WAFER PROCESSING TOOL HAVING A MICRO SENSOR
Embodiments include devices and methods for detecting material deposition and material removal performed by a wafer processing tool. In an embodiment, one or...
2017/0263510 METHOD OF PERFORMING ANALYSIS OF PATTERN DEFECT, IMPRINT APPARATUS, AND ARTICLE MANUFACTURING METHOD
There is provided a method of performing an analysis of a defect in a pattern of an imprint material on a substrate that has undergone an imprint process of...
2017/0263509 METHOD FOR REDUCING CORE-TO-CORE MISMATCHES IN SOC APPLICATIONS
Methods for reducing core-to-core mismatch are provided. The method includes measuring gate lengths of a representative pattern of each core in a first lot of...
2017/0263508 MEASUREMENT METHOD, MANUFACTURING METHOD OF DEVICE, AND MEASUREMENT SYSTEM
According to one embodiment, there is provided a measurement method. The method includes measuring an amount of overlay shift between a first layer and a...
2017/0263507 NANOWIRE SEMICONDUCTOR DEVICE
A method for forming a nanowire device comprises depositing a hard mask on portions of a silicon substrate having a <110>orientation wherein the hard...
2017/0263506 METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE
At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second...
2017/0263505 METHOD OF MAKING A FINFET DEVICE
A method for fabricating a fin field-effect transistor (FinFET) device includes forming a first dielectric layer over a substrate and then etching the first...
2017/0263504 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a plurality of fin shaped structures and an insulating...
2017/0263503 FIN TYPE FIELD EFFECT TRANSISTORS WITH DIFFERENT PITCHES AND SUBSTANTIALLY UNIFORM FIN REVEAL
A semiconductor device that includes a first plurality of fin structures in a first device region and a second plurality of fin structures in a second device...
2017/0263502 METHOD FOR MANUFACTURING ELEMENT CHIP
The method for manufacturing an element chip includes a mounting step and a plasma dicing step. In the mounting step, a semiconductor substrate with...
2017/0263501 ELEMENT CHIP AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing an element chip includes a laser dicing step of dividing the substrate to a plurality of element chips including the element region...
2017/0263500 METHOD FOR MANUFACTURING ELEMENT CHIP
The method includes a laser scribing step of forming an opening including an exposing portion, where the first layer is exposed, by irradiating the dividing...
2017/0263499 SEMICONDUCTOR MANUFACTURING METHOD
A semiconductor manufacturing method includes forming a first metal film on a semiconductor wafer by plating, ejecting liquid from a washer bar spaced from the...
2017/0263498 SOLDER FILL INTO HIGH ASPECT THROUGH HOLES
A method for filling a through hole with solder includes mounting a substrate having a through hole formed therein on a permeable barrier layer having pores...
2017/0263497 SEMICONDUCTOR DEVICE
A semiconductor device provided with a plurality of kinds of transistors with different device structures suitable for functions of circuits is provided. The...
2017/0263496 MATERIALS AND DEPOSITION SCHEMES USING PHOTOACTIVE MATERIALS FOR INTERFACE CHEMICAL CONTROL AND PATTERNING OF...
Embodiments of the invention include microelectronic devices and methods of forming such devices. In an embodiment, a microelectronic device, includes one or...
2017/0263495 CO-MANUFACTURING METHOD OF ZONES WITH DIFFERENT UNIAXIAL STRESSES
The method of manufacturing a structure comprising one or several strained semiconducting zones capable of forming one or several transistor channel regions,...
2017/0263494 SEMICONDUCTOR TRANSPORT MEMBER AND SEMICONDUCTOR MOUNTING MEMBER
Provided is a semiconductor transport member that includes a semiconductor mounting member capable of expressing a strong gripping force and unlikely to cause...
2017/0263493 SUPPORT CYLINDER FOR THERMAL PROCESSING CYLINDER
Embodiments of the disclosure generally relate to a support cylinder used in a thermal process chamber. In one embodiment, the support cylinder includes a...
2017/0263492 APPARATUS FOR MANUFACTURING A DISPLAY DEVICE AND A MANUFACTURING METHOD THEREOF
An apparatus for manufacturing a display device includes a first jig including a first side, the first side having a concave groove for receiving a cover...
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