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Patent # Description
2017/0262424 SIMULATION SYSTEM, SIMULATION METHOD, AND SIMULATION PROGRAM
In a conventional quantitative plan simulation, it is practically impossible to prepare a spreadsheet-type data input template applicable to all types of...
2017/0262423 Linking Visual Properties of Charts to Cells within Tables
Tools and techniques are described for linking visual properties of charts to cells within tables. Methods provided by these tools enable users to select...
2017/0262422 FRAMEWORK FOR CLASSIFYING FORMS AND PROCESSING FORM DATA
In response to a request received from a client device to view an item, a program determines a category associated with the item and a location associated with...
2017/0262421 Form Autofilling System
An autofill device directly connected with a client device over a peer to peer connection and to a server over a network connection, the autofill device being...
2017/0262420 PERSISTING ANNOTATIONS APPLIED TO AN ELECTRONIC HOSTED WHITEBOARD
A plurality of annotations can be received for a presentation presented in a web conference. A respective relevance parameter can be assigned to each of the...
2017/0262419 PERSISTING ANNOTATIONS APPLIED TO AN ELECTRONIC HOSTED WHITEBOARD
A plurality of annotations can be received for a presentation presented in a web conference. A respective relevance parameter can be assigned to each of the...
2017/0262418 SIMULATED ANNEALING TO PLACE ANNOTATIONS IN A DRAWING
A method, system, and computer program product provide the ability to optimize placement of annotations in a drawing model. A drawing model that has...
2017/0262417 SUMMARIZED DOCUMENT VERSION MAP
A method and system for rendering and displaying a graph summarizing the history of revisions to a document are provided. The graph provides a simplified...
2017/0262416 AUTOMATIC GENERATION OF DOCUMENTARY CONTENT
Embodiments are directed towards generating an interactive target document based on a static source document. The source document may be a textbook. An...
2017/0262415 METHOD AND SYSTEM OF A USER ASSOCIATING A FIRST WEBPAGE WEB LINK AND SECOND WEBPAGE LINK AND VIEWING OF THE...
A link association method and system. The method involves receiving by a computer processor from a user, a first link for a first Webpage and a second link for...
2017/0262414 DYNAMIC FONT SIMILARITY
Embodiments of the present invention are directed at providing a font similarity system. In one embodiment, a new font is detected on a computing device. In...
2017/0262413 AUTOMATICALLY CLASSIFYING AND PRESENTING DIGITAL FONTS
Systems and methods are disclosed for classifying digital fonts. In particular, in one or more embodiments, the disclosed systems and methods detect a new...
2017/0262412 NLP-BASED ENTITY RECOGNITION AND DISAMBIGUATION
Methods and systems for entity recognition and disambiguation using natural language processing techniques are provided. Example embodiments provide an entity...
2017/0262411 CALCULATOR AND MATRIX FACTORIZATION METHOD
For each process unit, a calculator allocates, in a storing unit, a first storage area with a storage capacity corresponding to the total data volume obtained...
2017/0262410 PARALLEL COMPUTER AND FFT OPERATION METHOD
A storage unit includes first to third storage areas. An operation unit executes, while executing a first process to perform an FFT (Fast Fourier Transform)...
2017/0262409 Complex Exponential Modulated Filter Bank for High Frequency Reconstruction or Parametric Stereo
An apparatus and method are disclosed for filtering an audio signal. The apparatus includes a high frequency reconstructor or parametric stereo processor, a...
2017/0262408 COMPUTING INTERSECTION CARDINALITY
A computer-implemented method for computing an intersection or an intersection cardinality of each pair of a set in a first list of a plurality of sets and a...
2017/0262407 RECONFIGURABLE DATA INTERFACE UNIT FOR COMPUTE SYSTEMS
A system-on-chip includes a reconfigurable data interface to prepare data streams for execution patterns of a processing unit in a flexible compute accelerate...
2017/0262406 OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSOR ENVIRONMENT
The present invention relates to a method for compiling code for a multi-core processor, comprising: detecting and optimizing a loop, partitioning the loop...
2017/0262405 REMOTE DIRECT MEMORY ACCESS-BASED ON STATIC ANALYSIS OF ASYNCHRONOUS BLOCKS
Described herein are methods of transferring arrays of data information by remote data memory access (RDMA). The method may include identifying data arrays in...
2017/0262404 Method and Bus for Accessing Dynamic Random Access Memory
Embodiments of the present disclosure provide a method and bus for accessing a dynamic random access memory (DRAM). The embodiments include receiving an access...
2017/0262402 DIGITAL INTERCONNECTS WITH PROTOCOL-AGNOSTIC REPEATERS
A system and method is described for simplifying implementation of repeater (e.g., re-driver/re-timer) module implementation in high-data-rate interconnects...
2017/0262401 DIGITAL INTERCONNECTS WITH PROTOCOL-AGNOSTIC REPEATERS
A system and method is described for simplifying implementation of repeater (e.g., re-driver/re-timer) module implementation in high-data-rate interconnects...
2017/0262400 Method for Serially Transmitting a Frame from a Transmitter to at Least One Receiver and Participants of a Bus...
The disclosure relates to a method for serially transmitting frames from a transmitter to at least one receiver via a bus line and to a participant station for...
2017/0262399 UNIVERSAL SERIAL BUS DATA ROUTING
Examples of a competing device for universal serial bus data routing are disclosed. In one example implementation according to aspects of the present...
2017/0262398 Power Efficient Distributed Beam Forming Architecture Using Interconnected Processing Nodes
A digital beamforming apparatus for use in a radar system. The digital beamforming apparatus comprises i) a plurality of multichip modules, each of the...
2017/0262397 Storage Apparatus and Data Access Method
A storage apparatus includes a printed circuit board (PCB) and multiple memory chips symmetrically arranged on two sides of the PCB, where multiple memory...
2017/0262396 Open Compute Project Network Card Converted to PCIe Riser
An Open Compute Project (OCP) mezzanine riser with repurposed connectivity to allow for increased PCIe card count on a motherboard server. The OCP mezzanine...
2017/0262395 METHOD, APPARATUS, SYSTEM FOR INCLUDING INTERRUPT FUNCTIONALITY IN SENSOR INTERCONNECTS
Methods, apparati, systems for including interrupt functionality in sensor interconnects field are disclosed in the present disclosure. A System on a Chip...
2017/0262394 PUSH PULL RINGING SUPPRESSION CIRCUIT
A circuit is provide comprising a first input coupled to a transmit data input of a bus transceiver; and a first output coupled to a bus. The circuit is...
2017/0262393 SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
A semiconductor device includes a processor for running a real-time operating system (RTOS). The RTOS causes the processor to update internal time during a...
2017/0262392 IMAGE PROCESSING APPARATUS, NOTIFICATION MONITORING PROGRAM, AND NOTIFICATION MONITORING METHOD
An information processing apparatus includes a memory; and a processor coupled to the memory and the processor configured to poll and monitor a plurality of...
2017/0262391 DISCRIMINATING DYNAMIC CONNECTION OF DISCONNECTABLE PERIPHERALS
An enterprise wide data processing system includes at least one watchdog unit and/or software service that is configured to automatically detect an attempt to...
2017/0262390 DEVICE, PRIORITIZING PROCESS METHOD AND COMPUTER-READABLE RECORDING MEDIUM
A device includes a memory and a processor coupled to the memory. The processor configured to determine types of applications which are to be executed by the...
2017/0262389 SYSTEM-ON-CHIP AND METHOD FOR EXCHANGING DATA BETWEEN COMPUTATION NODES OF SUCH A SYSTEM-ON-CHIP
A system including at least one computation node including a memory, a processor reading/writing data in a work area of the memory and a DMA controller...
2017/0262388 METHOD FOR DATA TRANSMISSION AND SERVER FOR IMPLEMENTING THE METHOD
A method for data transmission within a server that includes a processor, a main memory, a southbridge, a chipset, and a buffer, the chipset including a...
2017/0262387 PROTECTED POINTERS
A data processing machine is configured to automatically keep track of hypervisor given pointers pointing to respective and newly allocated areas of memory and...
2017/0262386 SCALABLE MEMORY PROTECTION MECHANISM
An apparatus to protect contents of a memory region is presented. In one embodiment, the apparatus includes a non-volatile memory, memory check logic to...
2017/0262385 METHOD AND APPARATUS FOR DATA STORAGE SERVICE
Embodiments of the present disclosure provide a method and apparatus for providing data storage service. The method comprises: receiving a storage service...
2017/0262384 METHOD FOR PROTECTING MEMORY AGAINST UNAUTHORIZED ACCESS
A method of protecting software for embedded applications against unauthorized access. Software to be protected is loaded into a protected memory area. Access...
2017/0262383 ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF
An electronic apparatus and a control method thereof are provided. The electronic apparatus includes a memory having a protection area and storing data of a...
2017/0262382 PROCESSING DEVICE, INFORMATION PROCESSING APPARATUS, AND CONTROL METHOD OF PROCESSING DEVICE
A processing device includes a cache memory to temporarily register data stored in the main memory and a registration circuit that, when registering the data...
2017/0262381 MULTI-RANGE LOOKUP IN TRANSLATION LOOKASIDE BUFFER
There is described a method and data processing apparatus configured to translate a virtual address into a physical address, the virtual address comprising an...
2017/0262380 SWITCH MODULE AND STORAGE SYSTEM
According to one embodiment, a switch module includes a first port with PCIe/NVMe standard being connectable to a host, second ports with PCIe/NVMe standard...
2017/0262379 MEMORY SYSTEM
According to one embodiment, a controller writes either processed data or preprocessing data and flags into each page included in m pages. The processed data...
2017/0262378 SYSTEM AND METHOD FOR RAM CAPACITY OPTIMIZATION USING ROM-BASED PAGING
Various embodiments of methods and systems for memory paging in a system on a chip ("SoC") are disclosed. An exemplary method includes identifying a subset of...
2017/0262377 MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY
According to one embodiment, when the first command is received from a host, a controller translates a first address designated by a first command into a...
2017/0262376 MEMORY HAVING A STATIC CACHE AND A DYNAMIC CACHE
The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first...
2017/0262375 PROGRAMMABLE CACHE SIZE VIA CLASS OF SERVICE CACHE ALLOCATION
Systems and methods for enabling programmable cache size via Class of Service (COS) cache allocation are described. In some embodiments, a method may include:...
2017/0262374 SYSTEM AND METHODS OF A CPU-EFFICIENT CACHE REPLACEMENT ALGORITHM
A method of updating a cache data structure that includes first, second, and third queues includes the step of storing contents of a data item in a cache...
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