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Patent # Description
2017/0272109 Method and Apparatus to Detect LO Leakage and Image Rejection using a Single Transistor
Local oscillator (LO) leakage and Image are common and undesirable effects in typical transmitters. Typically, fairly complex hardware and algorithms are used...
2017/0272108 MODEM ADAPTIVE ANTENNA TUNING (MAAT)
Certain aspects of the present disclosure provide methods and apparatus for adaptive antenna tuning. One example method for wireless communications generally...
2017/0272107 BLUETOOTH TRANSMITTER
A Bluetooth transmitter with features to reduce the likelihood of unwitting loss includes a first housing, a second housing, a circuit board, and a button. The...
2017/0272106 AMPLIFIER ADJUSTING DEVICE, SYSTEM INCLUDING AN AMPLIFIER ADJUSTING DEVICE AND METHOD FOR OPERATING AN...
The present invention describes an amplifier adjusting device for an amplifier element which is adjustable as a function of amplification factor and is coupled...
2017/0272105 Method and Device for Transmitting Information Over a Communication Channel with Variable Impedance
A method includes digital/analog conversion of a digital signal modulated by information to provide a modulated initial analog signal having a crest factor...
2017/0272104 HF FILTER MODULE WITH IMPROVED EXPANDABILITY
The invention relates to an HF module, the filter functionality of which can easily be expanded and which has good electrical properties. For this purpose, the...
2017/0272103 BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 2/15 AND...
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first...
2017/0272102 METHOD AND DATA STORAGE DEVICE USING CONVOLUTIONAL LOW-DENSITY PARITY-CHECK CODING WITH A LONG PAGE WRITE AND A...
In an illustrative example, an apparatus includes a controller and a memory that is configured to store a codeword of a convolutional low-density parity-check...
2017/0272101 MEMORY SYSTEM AND OPERATING METHOD THEREOF
A memory system includes a memory device; and a controller suitable for encoding a message, storing the encoded message in the memory device and decoding the...
2017/0272100 Distributed Storage System Data Management And Security
A system and method for distributing data over a plurality of remote storage nodes. Data are split into segments and each segment is encoded into a number of...
2017/0272099 BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 3/15 AND...
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first...
2017/0272098 BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 4/15 AND...
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first...
2017/0272097 LOW POWER SCHEME FOR BIT FLIPPING LOW DENSITY PARITY CHECK DECODER
A method of power saving for a low-density parity check (LDPC) decoder includes: during each decoding iteration, determining a syndrome weight; and using the...
2017/0272096 SYSTEMS, METHODS, AND APPARATUSES FOR DECOMPRESSION USING HARDWARE AND SOFTWARE
Detailed herein are embodiments of systems, methods, and apparatuses for decompression using hardware and software. For example, in embodiment a hardware...
2017/0272095 IMPROVED COMPRESSION AND ENCRYPTION OF A FILE
A computing device (100), comprising a memory (240) and a controller (210), wherein said controller (210) is configured to compress a file (410) by...
2017/0272094 ANALOG TO DIGITAL CONVERTER INCLUDING DIFFERENTIAL VCO
An analog to digital converter is provided. The analog to digital converter includes: an arithmetic operator combining an analog input signal with a feedback...
2017/0272093 LEVEL SHIFTER, DIGITAL-TO-ANALOG CONVERTER, AND BUFFER AMPLIFIER, AND SOURCE DRIVER AND ELECTRONIC DEVICE...
A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The...
2017/0272092 DIGITAL-TO-ANALOG CONVERTER AND SOURCE DRIVER USING THE SAME
A digital-to-analog converter including a resistor string configured to provide a plurality of gradation voltages formed by receiving a top voltage at one end...
2017/0272091 SUCCESSIVE-APPROXIMATION REGISTER (SAR) ANALOG-TO-DIGITAL CONVERTER (ADC) WITH ULTRA LOW BURST ERROR RATE
Systems and methods are provided for a successive approximation register (SAR) analog-to-digital converter (ADC) with an ultra-low burst error rate....
2017/0272090 SIGNAL CALIBRATION CIRCUIT AND SIGNAL CALIBRATION DEVICE
A signal calibration circuit and a signal calibration method are provided. The signal calibration circuit includes: an analog-to-digital conversion circuit,...
2017/0272089 DYNAMIC POWER SWITCHING IN CURRENT-STEERING DACS
Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply...
2017/0272088 ANALOG TO DIGITAL CONVERSION CIRCUIT
An analog-to-digital (AD) convertor includes: a capacitance digital-to-analog (DA) convertor circuit; a comparator circuit coupled to the capacitance DA...
2017/0272087 COMPUTING APPARATUS AND COMPUTING METHOD
According to an embodiment, a computing apparatus includes spin torque oscillators, an interaction unit, a variable direct-current supply device, and a...
2017/0272086 SLEW RATE LOCKED LOOP
A method of controlling and maintaining a constant slew rate at an output of a buffer is provided. The method includes the following steps: (a) receiving, (i)...
2017/0272085 Wide Frequency Range Delay Locked Loop
A delay locked loop operates over a wide range of frequencies and has high accuracy, small silicon area usage, low power consumption and a short lock time. The...
2017/0272084 SET POINT ADJUSTER FOR OSCILLATOR DRIVER
A circuit includes an oscillator having a driver and a resonator. The driver receives a supply voltage at a supply input and provides a drive output to drive...
2017/0272083 OSCILLATOR, ELECTRONIC APPARATUS, AND VEHICLE
A temperature-compensated oscillator includes a resonator element, an oscillating circuit, and a temperature compensation circuit, and in a case of varying...
2017/0272082 OSCILLATOR, ELECTRONIC APPARATUS, AND VEHICLE
A temperature-compensated oscillator includes a resonator element, an oscillating circuit, and a temperature compensation circuit, and a frequency deviation...
2017/0272081 OVEN CONTROLLED CRYSTAL OSCILLATOR CONSISTING OF HEATER-EMBEDDED CERAMIC PACKAGE
An oven controlled crystal oscillator consisting of heater-embedded ceramic package includes a substrate, a crystal package, a crystal blank, a metal lid, a...
2017/0272080 Circuitry and Layouts for XOR and XNOR Logic
An exclusive-or circuit includes a pass gate controlled by a second input node. The pass gate is connected to pass through a version of a logic state present...
2017/0272079 SEMICONDUCTOR DEVICE
An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of...
2017/0272078 INTEGRATED CIRCUIT AND ELECTRONIC DEVICE
An integrated circuit according to an embodiment includes: a first block including a first logic block configured to perform a logical operation, a first...
2017/0272077 MULTIPLEXER REDUCTION FOR PROGRAMMABLE LOGIC DEVICES
Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a method includes identifying a...
2017/0272076 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
A semiconductor integrated circuit device may include a main inverter and a negative bias temperature instability (NBTI) compensating circuit. The main...
2017/0272075 Novel Level Shifter
A circuit is disclosed. The circuit includes eight MOD transistors and a capacitor, the first MOS transistor having a source coupled to a first predetermined...
2017/0272074 DIGITAL SIGNAL UP-CONVERTING APPARATUS AND RELATED DIGITAL SIGNAL UP-CONVERTING METHOD
A digital signal up-converting apparatus includes: a clock generating circuit arranged to generate a reference clock signal; an adjusting circuit coupled to...
2017/0272073 DYNAMIC PARAMETER OPERATION OF AN FPGA
Methods and systems for operating a programmable logic fabric including a dynamic parameter scaling controller that tracks an operating parameter that...
2017/0272072 SEMICONDUCTOR DEVICE INCLUDING ELECTROSTATIC PROTECTION CIRCUIT
A semiconductor device includes: a first power source (PS1) pad supplied with a PS1 voltage; a PS1 line connected to the PS1 pad; a first ground line (G1); an...
2017/0272071 INDUCTIVE PROXIMITY SENSOR OF INTEGRATED DESIGN
A front end for an inductive proximity sensor includes a coil for detecting an approaching metal object and a circuit board, wherein the coil is designed as a...
2017/0272070 SEMICONDUCTOR SWITCH AND COMMUNICATION MODULE
A semiconductor switch includes a first switching element connected between a first terminal and a second terminal, a second switching element connected...
2017/0272069 SEMICONDUCTOR DEVICE
A semiconductor device includes a gate terminal, a ground terminal, a power-supply terminal, and a source terminal. The semiconductor device includes a first...
2017/0272067 METHOD AND DEVICE FOR CONTROLLING POWER SEMICONDUCTOR SWITCHES CONNECTED IN PARALLEL
The invention relates to a method (200) and a control device (1) for controlling at least two power semiconductor switches (LHS1 . . . LHSn) connected in...
2017/0272066 RADIO FREQUENCY (RF) SWITCH WITH ON AND OFF SWITCHING ACCELERATION
A Radio Frequency (RF) switch having two or more stages coupled in series is disclosed. A first Field-Effect Transistor (FET) with a first control terminal is...
2017/0272065 PROGRAMMABLE NEUROMORPHIC DEVICE
Technologies are generally described for an array of logic elements effective to generate a data signal. A first logic element may include an input circuit, a...
2017/0272064 INTEGRATED CIRCUITS RELATING TO TRANSMISSION DATA
An integrated circuit may be provided. The integrated circuit may include a transmitter and a receiver. The transmitter outputs first transmission data to a...
2017/0272063 DELAY CIRCUIT
A delay circuit includes: a plurality of delay units that are serially coupled with each other in a form of loop and sequentially delay an input signal of the...
2017/0272062 CLOCK GENERATOR USING PASSIVE MIXER AND ASSOCIATED CLOCK GENERATING METHOD
A clock generator has a buffer stage circuit, a passive mixer, and a channel selecting circuit. The buffer stage circuit receives a plurality of first...
2017/0272061 VOLTAGE CLAMPING CIRCUIT
A voltage clamping circuit is provided. In an embodiment, the voltage clamping circuit includes a plurality of gain shifting circuits and a signal processing...
2017/0272060 OSCILLATION CIRCUIT, BOOSTER CIRCUIT, AND SEMICONDUCTOR DEVICE
Provided are an oscillation circuit, a booster circuit, and a semiconductor device capable of reducing power consumption when a power supply voltage is high....
2017/0272059 ACTIVE CIRCUIT CAPABLE OF PREVENTING IMPEDANCE FROM BEING MISMATCHED IN A BYPASS MODE
An active circuit includes an active element, an input unit, and a bypass unit. The active element is coupled to an output terminal of the active circuit for...
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