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Patent # Description
2017/0271551 QUANTUM DOT LIGHT-EMITTING DEVICE
A quantum dot light-emitting device includes: a first electrode; a second electrode opposite to the first electrode; an emission layer between the first...
2017/0271550 DEEP ULTRAVIOLET LIGHT-EMITTING DIODE CHIP AND PACKAGE STRUCTURE CONTAINING THE SAME
A deep UV LED chip includes a light-emitting unit, an electrode unit, an electron blocking layer, and an optical layer. The electron blocking layer is disposed...
2017/0271549 METHOD OF PREPARING QUANTUM DOT LAYER, QLED DISPLAY DEVICE HAVING THE QUANTUM DOT LAYER AND METHOD OF PREPARING...
A method of preparing a quantum dot layer, including: placing an anodic aluminum oxide sheet with a plurality of through holes on a substrate; dispersing...
2017/0271548 LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure provides a method for manufacturing a light-emitting device, comprising: providing a first substrate; providing a semiconductor stack on...
2017/0271547 LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME
A compound semiconductor device comprises a substrate, comprising a top surface, a bottom surface, a side surface connecting the top surface and the bottom...
2017/0271546 BIOLOGICAL DETECTION DEVICE AND PROCESSING METHOD OF THE SAME
The present disclosure provides a biological detection device and a processing method of the same. The biological detection device comprises a chip, a light...
2017/0271545 Compensated Photonic Device Structure And Fabrication Method Thereof
Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may...
2017/0271544 SEMICONDUCTOR PHOTO-RECEIVING DEVICE
According to one embodiment, a semiconductor photo-receiving device includes a substrate, a light propagation layer and a semiconductor layer including a...
2017/0271543 Compensated Photonic Device Structure And Fabrication Method Thereof
Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. A photonic device may include a...
2017/0271542 TRANSDUCER TO CONVERT OPTICAL ENERGY TO ELECTRICAL ENERGY
An optical transducer system that has a light source and a transducer. The light source generates light that has a predetermined photon energy. The transducer...
2017/0271541 PHOTOELECTRIC CONVERSION ELEMENT, PHOTOELECTRIC CONVERSION ELEMENT MODULE, PHOTOVOLTAIC CELL, AND PHOTOVOLTAIC...
A photoelectric conversion element of an embodiment includes a first electrode, a second electrode, and a light absorbing layer, containing a chalcopyrite-type...
2017/0271540 BIFACIAL SOLAR CELL
A bifacial solar cell includes a substrate; an emitter portion formed on a first surface of the substrate; a first insulating layer formed on the emitter...
2017/0271539 Method of Manufacturing Printed Photovoltaic Modules
The invention concerns a method of manufacturing a photovoltaic module comprising at least two electrically connected photovoltaic cells, each photovoltaic...
2017/0271538 MODULE LEVEL SOLUTION TO SOLAR CELL POLARIZATION USING AN ENCAPSULANT WITH OPENED UV TRANSMISSION CURVE
A solar cell module includes interconnected solar cells, a transparent cover over the front sides of the solar cells, and a backsheet on the backside of the...
2017/0271537 FILTERLESS COLOR IMAGE SENSOR
Embodiments are directed to a chalcogenide material-based filterless color image sensor, which includes a substrate, a first chalcogenide material layer formed...
2017/0271536 SYSTEM AND METHOD FOR CREATING A PATTERN ON A PHOTOVOLTAIC STRUCTURE
A system and method for fabricating a photovoltaic structure is provided. During fabrication, the system can apply a wax coating on at least one surface of a...
2017/0271535 A SILVER PASTE CONTAINING BISMUTH OXIDE AND ITS USE IN SOLAR CELLS
The present invention is directed to a silver paste for a Si solar cell comprising a high purity Bi.sub.2O.sub.3 additive and a solar cell having a silicon...
2017/0271534 SOLAR CELL IN STACK STRUCTURE HAVING NO STEP
A solar cell in a stack structure having no step may include a solar cell, and an electrode formed on one surface of the solar cell, in which the solar cell...
2017/0271533 PHOTOVOLTAIC DEVICE INCLUDING A P-N JUNCTION AND METHOD OF MANUFACTURING
A photovoltaic device includes a substrate structure and a p-type semiconductor absorber layer, the substrate structure including a CdSSe layer. A photovoltaic...
2017/0271532 PASSIVATED IRON DISULFIDE SURFACE ENCAPSULATED IN ZINC SULFIDE
A passivated iron disulfide (FeS.sub.2) surface encapsulated by an epitaxial zinc sulfide (ZnS) capping layer or matrix is provided. Also disclosed are methods...
2017/0271531 METHOD OF PASSIVATING AN IRON DISULFIDE SURFACE VIA ENCAPSULATION IN A ZINC SULFIDE MATRIX
A method for passivating the surface of crystalline iron disulfide (FeS.sub.2) by encapsulating it within an epitaxial zinc sulfide (ZnS) matrix. Also...
2017/0271530 LOW NOISE DETECTORS FOR ASTRONOMY
Methods, systems, and apparatus that filters noise within a signal collected by a detector assembly. The detector assembly includes a first semiconductor layer...
2017/0271529 AVALANCHE PHOTO DETECTOR DEVICE AND MANUFACTURING METHOD THEREOF
An avalanche photodetector device includes a substrate having a front side and a back side, an avalanche photo detector structure disposed on the front side of...
2017/0271528 SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor layer located between first and second electrodes. The contact location of the semiconductor layer with the...
2017/0271527 SEMICONDUCTOR MEMORY DEVICE WITH CHARGE-DIFFUSION-LESS TRANSISTORS
A semiconductor memory device includes a substrate, a multi-layered structure including a plurality of insulating layers and a plurality of conductive layers...
2017/0271526 SEMICONDUCTOR DEVICE
A semiconductor device that can operate at high speed or having high strength against stress is provided. One embodiment of the present invention is a...
2017/0271525 REDUCED PARASITIC CAPACITANCE AND CONTACT RESISTANCE IN ETSOI DEVICES
A method for forming a semiconductor device includes etching a semiconductor layer using a gate structure and spacers as a mask to protect portions of the...
2017/0271524 TFT SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF
A manufacturing method of a TFT substrate structure is provided, in which a graphene layer is formed on a semiconductor layer and after the formation of a...
2017/0271523 SEMICONDUCTOR DEVICE
Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized...
2017/0271522 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes a bit line; two or more word lines; and a memory cell including two or more sub memory cells that each include a...
2017/0271521 TRANSISTOR, METHOD FOR MANUFACTURING TRANSISTOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is...
2017/0271520 SEMICONDUCTOR DEVICE, MODULE, AND ELECTRONIC DEVICE
To provide a semiconductor device with small parasitic capacitance. Alternatively, to provide a semiconductor device with low power consumption. The...
2017/0271519 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small...
2017/0271518 SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME
According to one embodiment, a semiconductor device includes an insulating substrate, an oxide semiconductor layer, a gate insulating film, a gate electrode, a...
2017/0271517 SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MODULE, ELECTRONIC DEVICE, AND MANUFACTURING METHOD THEREOF
A semiconductor device including a highly reliable transistor is provided. A semiconductor device includes a transistor. The transistor includes first and...
2017/0271516 SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, AND ELECTRONIC DEVICE
A semiconductor device is provided in which the power consumption can be reduced by reducing the driving voltage and the on-state current can be increased in a...
2017/0271515 STRAINED CHANNEL REGION TRANSISTORS EMPLOYING SOURCE AND DRAIN STRESSORS AND SYSTEMS INCLUDING THE SAME
Embodiments of the present invention provide transistor structures having strained channel regions. Strain is created through lattice mismatches in the source...
2017/0271513 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A silicide layer on a gate electrode of a MONOS memory is prevented from being disconnected, and a property of a MISFET is improved. As means for that, when a...
2017/0271512 LINER-LESS CONTACT METALLIZATION
A low resistance middle-of-line interconnect structure is formed without liner layers. A contact metal layer is deposited on source/drain regions of...
2017/0271511 Embedded JFETs for High Voltage Applications
A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of...
2017/0271510 VERTICAL DEVICE ARCHITECTURE
In some embodiments, the present disclosure relates to a vertical transistor device, and an associated method of formation. The transistor device has a source...
2017/0271509 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
An interlayer insulating film is formed on a gate insulating film and a gate electrode, and the interlayer insulating film is opened forming contact holes....
2017/0271508 SEMICONDUCTOR DEVICES
A semiconductor device includes a semiconductor substrate including a first source/drain region formed in an upper portion of the semiconductor substrate, a...
2017/0271507 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a p-type first silicon carbide region between the first...
2017/0271506 SEMICONDUCTOR DEVICE
An nchMOSFET of a level-raising circuit is arranged in a high voltage junction termination region (HVJT), to be integrated with a parasitic diode formed by an...
2017/0271505 N-TYPE LATERAL DOUBLE-DIFFUSED METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR
An N type lateral double-diffused metal oxide semiconductor field effect transistor (200) includes a substrate (202); a first N well (204) formed on the...
2017/0271504 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME
A semiconductor structure and a manufacturing method for the same are disclosed. The semiconductor structure includes a first gate structure, a second gate...
2017/0271503 STRUCTURE AND METHOD FOR PROVIDING LINE END EXTENSIONS FOR FIN-TYPE ACTIVE REGIONS
A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active...
2017/0271502 METHOD OF FORMING HIGH-GERMANIUM CONTENT SILICON GERMANIUM ALLOY FINS ON INSULATOR
A method of forming high germanium content silicon germanium alloy fins with controlled insulator layer recessing is provided. A silicon germanium alloy (SiGe)...
2017/0271501 SCALED TFET TRANSISTOR FORMED USING NANOWIRE WITH SURFACE TERMINATION
Described is a TFET comprising: a nanowire having doped regions for forming source and drain regions, and an un-doped region for coupling to a gate region; and...
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