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Patent # Description
2017/0271500 SEMICONDUCTOR LATERAL SIDEWALL GROWTH FROM A SEMICONDUCTOR PILLAR
A method is provided that may include providing a plurality of semiconductor pillars extending from a surface of a substrate, wherein a spacer is present on...
2017/0271499 THERMAL-AWARE FINFET DESIGN
According to various aspects, a thermal-aware finned field-effect transistor (FinFET) may have a design that can substantially reduce hot spot temperatures and...
2017/0271498 SEMICONDUCTOR DEVICE WITH NON-UNIFORM TRENCH OXIDE LAYER
A semiconductor device includes a trench formed in an epitaxial layer and an oxide layer that lines the sidewalls of the trench. The thickness of the oxide...
2017/0271497 BYPASSED GATE TRANSISTORS HAVING IMPROVED STABILITY
A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate...
2017/0271496 HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF FORMING THE SAME
A High Electron Mobility Transistor (HEMT) made of nitride semiconductor materials and a process of forming the same are disclosed. The HEMT has a feature that...
2017/0271495 SEMICONDUCTOR DEVICE
A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride...
2017/0271494 FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
A field effect transistor according to the present invention includes a semiconductor layer including a groove, an insulating film formed on an upper surface...
2017/0271493 SEMICONDUCTOR DEVICE
A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride...
2017/0271492 HIGH-ELECTRON-MOBILITY TRANSISTOR (HEMT) CAPABLE OF PROTECTING III-V COMPOUND LAYER
A semiconductor structure comprises a semiconductive substrate comprising a top surface, a III-V compound layer over the semiconductive substrate, and a first...
2017/0271491 Semiconductor Transistor and Method for Forming the Semiconductor Transistor
A vertical semiconductor field-effect transistor includes a semiconductor body having a front side, and a field electrode trench extending from the front side...
2017/0271490 SEMICONDUCTOR DEVICE
A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first...
2017/0271489 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
In one embodiment, an IGBT is formed to include a region of semiconductor material. Insulated gate structures are disposed in region of semiconductor material...
2017/0271488 Bipolar Semiconductor Device with Multi-Trench Enhancement Regions
There are disclosed herein various implementations of a bipolar semiconductor device with multi-trench enhancement regions. Such a bipolar semiconductor device...
2017/0271487 Bipolar Semiconductor Device with Sub-Cathode Enhancement Regions
There are disclosed herein various implementations of a bipolar semiconductor device with sub-cathode enhancement regions. Such a bipolar semiconductor device...
2017/0271486 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
After a titanium nitride film is formed to cover an interlayer insulating film, a first nickel film is formed on a front surface of a silicon carbide base...
2017/0271485 HIGH-VOLTAGE SEMICONDUCTOR STRUCTURE
A high-voltage semiconductor structure including a substrate, a first doped region, a well, a second doped region, a third doped region, a fourth doped region,...
2017/0271484 FINFET BASED FLASH MEMORY CELL
A method of manufacturing a flash memory cell is provided including forming a plurality of semiconductor fins on a semiconductor substrate, forming floating...
2017/0271483 TRANSISTOR STRUCTURE WITH VARIED GATE CROSS-SECTIONAL AREA
Aspects of the present disclosure include finFET structures with varied cross-sectional areas and methods of forming the same. Methods according to the present...
2017/0271482 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
The present disclosure provides a method for forming a semiconductor device, including: forming a mask layer over a substrate, the mask layer containing an...
2017/0271481 VERTICAL TRANSISTOR FABRICATION AND DEVICES
A method of fabricating a vertical field effect transistor including forming a first recess in a substrate; epitaxially growing a first drain from the first...
2017/0271480 Vertical Power MOSFET and Methods of Forming the Same
A device includes a semiconductor layer of a first conductivity type, and a first and a second body region over the semiconductor layer, wherein the first and...
2017/0271479 SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
A method of fabricating a semiconductor device is provided as follows. A source/drain pattern is formed on a substrate. The source/drain pattern contains...
2017/0271478 TRANSISTOR STRAIN-INDUCING SCHEME
A transistor device includes a gate structure disposed over a channel region of a semiconductor substrate. A source/drain recess is arranged in the...
2017/0271477 NANOSHEET AND NANOWIRE DEVICES HAVING DOPED INTERNAL SPACERS AND METHODS OF MANUFACTURING THE SAME
A method of forming a horizontal nanosheet device or a horizontal nanowire device includes forming a dummy gate and a series of external spacers on a stack...
2017/0271476 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
In a method of manufacturing a semiconductor device, an isolation pattern may be formed on a substrate to define a plurality of active patterns. The active...
2017/0271475 INTEGRATED ETCH STOP FOR CAPPED GATE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a plurality of gate stacks spaced apart from each other on a substrate, an etch stop layer formed on an upper surface of each...
2017/0271474 FET INCLUDING AN INGAAS CHANNEL AND METHOD OF ENHANCING PERFORMANCE OF THE FET
According to an embodiment of the present invention, a method of manufacturing a FET device having a set BTBT leakage and a maximum V.sub.DD includes:...
2017/0271473 SIDEWALL PASSIVATION FOR HEMT DEVICES
Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a...
2017/0271472 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
Heat treatment is performed twice with respect to a silicon carbide substrate. In the first heat treatment process, after Si ions are implanted in a front...
2017/0271471 NiPt AND Ti INTERSECTING SILICIDE PROCESS AND STRUCTURE
A method includes forming a first silicide on a substrate after patterning a gate and spacer onto the substrate. A film is deposited over the substrate. A...
2017/0271470 METHOD FOR FABRICATION OF A FIELD-EFFECT WITH REDUCED STRAY CAPACITANCE
A method of fabrication, including the steps for supplying a substrate including a layer of semiconductor material covered by a sacrificial gate including a...
2017/0271469 Method of Fabricating a Semiconductor Device Having Modified Profile Metal Gate
A method of forming a semiconductor device having a semiconductor substrate with a dielectric layer disposed thereon. A trench is defined in the dielectric...
2017/0271468 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
A silicon carbide semiconductor device includes an n.sup.+-type SiC substrate, a gate oxide film formed on a portion of the surface of the n.sup.+-type SiC...
2017/0271467 SEMICONDUCTOR DEVICE
A semiconductor device includes first and second electrodes and a silicon carbide layer located between the first and second electrodes. A plurality of gate...
2017/0271466 SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes a semiconductor layer, a first electrode, first and second oxide layers, and a storage...
2017/0271465 Semiconductor Structure for Flash Memory Cells and Method of Making Same
An exemplary method includes forming a common source region in a substrate, and forming an isolation feature over the common source region. The common source...
2017/0271463 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a semiconductor device includes forming a conductive pattern on a substrate, forming a filling insulation layer covering the...
2017/0271462 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device may include a substrate including an NMOS region and a PMOS region, and having a protrusion pattern; first and second gate structures...
2017/0271461 ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICE
An array substrate includes a gate electrode and a source electrode arranged on a base substrate of the array substrate. The source electrode has a first end...
2017/0271460 SEMICONDUCTOR DEVICE FOR ULTRA-HIGH VOLTAGE OPERATION AND METHOD FOR FORMING THE SAME
A semiconductor device for ultra-high voltage (UHV) operation disclosed in the present invention includes a substrate having a normally-on channel, a negative...
2017/0271459 NANOPOROUS SEMICONDUCTOR MATERIALS AND MANUFACTURE THEREOF
Methods for forming nanoporous semiconductor materials are described. The methods allow for the formation of micron-scale arrays of sub-10 nm nanopores in...
2017/0271458 Device Isolation for III-V Substrates
Techniques for device isolation for III-V semiconductor substrates are provided. In one aspect, a method of fabricating a III-V semiconductor device is...
2017/0271457 SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor substrate of silicon carbide, and a temperature sensor portion. The semiconductor substrate includes a portion...
2017/0271456 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
An interlayer insulating film is patterned, contact holes are formed, and in the contact holes, a source contact portion forming an ohmic contact with the...
2017/0271455 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
A silicon carbide semiconductor device, including a silicon carbide semiconductor substrate of a first conductivity type, a first silicon carbide semiconductor...
2017/0271454 SUBSTRATE STRUCTURE, SEMICONDUCTOR COMPONENT AND METHOD
In an embodiment, a substrate structure includes a support substrate, a buffer structure arranged on the support substrate, the buffer structure including an...
2017/0271453 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided is a semiconductor device including a second conductivity type low-concentration diffusion layer (101) for an electric field relaxation reaching a...
2017/0271452 SEMICONDUCTOR DEVICE
In a conventional semiconductor chip, the source electrode and the sense pad electrode for current detection are provided separately and distanced from each...
2017/0271451 SEMICONDUCTOR DEVICE
A semiconductor device includes a first-conductivity type first semiconductor region, a gate electrode extending inwardly of the first semiconductor region, a...
2017/0271450 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate having an upper surface layer of a second conduction type formed at an upper surface side, a drift layer of a first...
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