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Patent # Description
2017/0271348 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor memory device includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a first conductive film...
2017/0271347 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, and a columnar portion. The stacked body includes a first...
2017/0271346 ANTI-FUSE NONVOLATILE MEMORY DEVICES EMPLOYING LATERAL BIPOLAR JUNCTION TRANSISTORS AS SELECTION TRANSISTORS
An anti-fuse nonvolatile memory device includes an anti-fuse memory cell and a bipolar junction transistor. The anti-fuse, memory cell has a first terminal and...
2017/0271345 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
According to embodiments, a semiconductor memory device includes a plurality of control gate electrodes laminated above a substrate and extend in a first...
2017/0271344 SEMICONDUCTOR DEVICE INCLUDING MEMORY CELL ARRAY AND POWER SUPPLY REGION
A semiconductor device having an SRAM which includes: a monolithic first active region in which a first transistor and a fifth transistor are disposed; a...
2017/0271343 Structure and Method for FinFET SRAM
A semiconductor device comprises four SRAM cells in four quadrants of a region of the semiconductor device, wherein the four SRAM cells include FinFET...
2017/0271342 Layout Design for Manufacturing a Memory Cell
Arrays of static random access memory (SRAM) cells and methods of fabricating the same are provided. A first communication path is disposed a first distance...
2017/0271341 SEMICONDUCTOR MEMORY DEVICE INCLUDING A SENSE AMPLIFIER ON A SEMICONDUCTOR SUBSTRATE, A MEMORY CELL INCLUDING A...
According to one embodiment, a semiconductor memory device includes a sense amplifier on a semiconductor substrate, a memory cell array including a memory cell...
2017/0271340 SEMICONDUCTOR DEVICES
Example embodiments relate to a semiconductor device. The semiconductor device includes a substrate including an active region extending in a first direction,...
2017/0271339 Compact Semiconductor Memory Device Having Reduced Number of Contacts, Methods of Operating and Methods of Making
An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The...
2017/0271338 SEMICONDUCTOR DEVICE
An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a...
2017/0271337 SEMICONDUCTOR DEVICE
A semiconductor device including a non-volatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which...
2017/0271336 SEMICONDUCTOR DEVICES INCLUDING AN ISOLATION LAYER ON A FIN AND METHODS OF FORMING SEMICONDUCTOR DEVICES...
Semiconductor devices are provided. A semiconductor device includes a fin protruding from a substrate. Moreover, the semiconductor device includes first and...
2017/0271335 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A method of fabricating a semiconductor device includes preparing a substrate including a first region and a second region, sequentially forming a first...
2017/0271334 PATTERNED GATE DIELECTRICS FOR III-V-BASED CMOS CIRCUITS
Semiconductor devices and methods of making the same include forming a first channel region on a first semiconductor region. A second channel region is formed...
2017/0271333 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the...
2017/0271331 SEMICONDUCTOR DEVICE
A semiconductor device includes a first pillar-shaped semiconductor layer in which a second first-conductivity-type semiconductor layer, a first body region, a...
2017/0271330 SEMICONDUCTOR DEVICE HAVING FIN-TYPE FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a first fin structure disposed on a substrate. The first fin structure extends in a first direction. A first sacrificial layer...
2017/0271329 Transistor with Bypassed Gate Structure Field
A transistor device includes a source contact extending in a first direction, a gate finger extending in the first direction adjacent the source contact, and a...
2017/0271328 Double-Base-Connected Bipolar Transistors with Passive Components Preventing Accidental Turn-On
The present application discloses new approaches to providing "passive-off" protection for a B-TRAN-like device. Even if the control circuitry is inactive, AC...
2017/0271327 GROUP-III NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
The present invention discloses a group-III nitride semiconductor device, which comprises a substrate, a buffer layer, a semiconductor stack structure, and a...
2017/0271326 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a plurality of transistors formed on a transistor region of the substrate, a plurality of diodes formed on a diode...
2017/0271325 METHOD OF FORMING MOS AND BIPOLAR TRANSISTORS
Bipolar transistors and MOS transistors are formed in a common process. A semiconductor layer is arranged on an insulating layer. On a side of the bipolar...
2017/0271324 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a first drain region that is made primarily of SiC, a drift layer, a channel region, a first source region, a source electrode...
2017/0271323 SEMICONDUCTOR DEVICE
A semiconductor device includes a base region of second conductivity type formed on a drift layer of first conductivity type, a source region of first...
2017/0271322 AREA-EFFICIENT AND ROBUST ELECTROSTATIC DISCHARGE CIRCUIT
Described is an apparatus which comprises: a pad; a first transistor coupled in series with a second transistor and coupled to the pad; and a self-biasing...
2017/0271321 SEMICONDUCTOR DEVICE INCLUDING AN ESD PROTECTION ELEMENT
A semiconductor device includes an off transistor using an NMOS as an ESD protection element that has N-type drain region (102), and P-type drain region (103)...
2017/0271320 HIGH SPEED INTERFACE PROTECTION APPARATUS
The disclosed technology relates to electronics, and more particularly, to protection devices that protect circuits from transient electrical events such as...
2017/0271319 Semiconductor Device
A semiconductor device includes a semiconductor body having opposite first and second surfaces. The semiconductor device further includes a transistor...
2017/0271318 SEMICONDUCTOR DEVICE
A variable capacitance device that includes a semiconductor substrate, a redistribution layer disposed on a surface of the semiconductor substrate, and a...
2017/0271317 INTEGRATED CIRCUIT, AND DESIGN METHOD, DESIGN APPARATUS AND DESIGN PROGRAM FOR INTEGRATED CIRCUIT
Disclosed is an integrated circuit that enables the addition of larger amount of capacitance to the integrated circuit itself. The integrated circuit includes...
2017/0271316 Hollow Metal Pillar Packaging Scheme
An integrated circuit includes a bottom substrate, a metal layer disposed over the bottom substrate and a hollow metal pillar disposed on the metal layer. The...
2017/0271315 SEMICONDUCTOR DEVICE USING EMC WAFER SUPPORT SYSTEM AND FABRICATING METHOD THEREOF
Provided are a semiconductor device using, for example, an epoxy molding compound (EMC) wafer support system and a fabricating method thereof, which can, for...
2017/0271314 SEMICONDUCTOR DEVICE
Inside an IGBT using GaN or SiC, light having an energy of approximately 3 [eV] is generated. Therefore, defects are caused in the gate insulating film of the...
2017/0271313 Semiconductor Devices for Integration with Light Emitting Chips and Modules Thereof
A semiconductor device includes an active region disposed in a semiconductor substrate and an uppermost metal level including metal lines, where the uppermost...
2017/0271312 DISPLAY APPARATUS AND A METHOD OF MANUFACTURING THE SAME
A display apparatus includes a flexible substrate, a light-emitting diode (LED), and a partitioning wall pattern. The flexible substrate includes a ...
2017/0271311 Package on Package (PoP) Bonding Structures
Various embodiments of mechanisms for forming through package vias (TPVs) with multiple conductive layers and/or recesses in a die package and a package on...
2017/0271310 LED MODULE AND LED MODULE MOUNTING STRUCTURE
An LED module includes a substrate having a main surface and a rear surface located opposite the main surface, a main surface electrode located on the main...
2017/0271309 THREE-DIMENSIONAL HYBRID PACKAGING WITH THROUGH-SILICON-VIAS AND TAPE-AUTOMATED-BONDING
A 3-dimensional hybrid package including an integrated circuit chip stack formed on a laminate, the integrated chip stack further including a first chip and a...
2017/0271308 STACK CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME
A stack chip package may include a plurality of stacked semiconductor chips. Each of the semiconductor chips may have a first node, a second node, a third node...
2017/0271307 SEMICONDUCTOR PACKAGE AND FABRICATING METHOD THEREOF
A semiconductor package structure and a method for making a semiconductor package. As non-limiting examples, various aspects of this disclosure provide various...
2017/0271306 PACKAGING STRUCTURE AND PACKAGING METHOD THEREOF
A packaging structure and a packaging method are provided. The packaging structure includes a carrier semiconductor structure including a carrier substrate, a...
2017/0271305 Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages
A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a...
2017/0271304 Dual Lead Frame Semiconductor Package and Method of Manufacture
A semiconductor package and a method for making the same are provided. In the method, a clip is used to conduct a lead frame and at least one chip. The clip...
2017/0271303 DIFFUSION BARRIER LAYER FOR RADIO FREQUENCY TRANSMISSION LINE
This disclosure relates to a diffusion barrier layer for a radio frequency (RF) transmission line. The diffusion barrier layer includes a material and has a...
2017/0271302 MOBILE DEVICE WITH RADIO FREQUENCY TRANSMISSION LINE
This disclosure relates to a mobile device with a transmission line for a radio frequency (RF) signal. The transmission line includes a bonding layer having a...
2017/0271301 RADIO FREQUENCY TRANSMISSION LINE
This disclosure relates to a radio frequency (RF) transmission line for high performance RF applications. The RF transmission line includes a bonding layer...
2017/0271300 HETERO-BIPOLAR TRANSISTOR AND METHOD FOR PRODUCING THE SAME
A semiconductor device provided with a substrate made of material except for semiconductors and having thermal conductivity greater than that of the...
2017/0271299 ANISOTROPIC CONDUCTIVE FILM (ACF), BONDING STRUCTURE, AND DISPLAY PANEL, AND THEIR FABRICATION METHODS
An anisotropic conductive film (ACF), a bonding structure, and a display panel, and their fabrication methods are provided. The ACF includes a resin gel and a...
2017/0271298 METHOD FOR PRODUCING A CHIP ASSEMBLAGE
One aspect of the invention relates to a method for producing a chip assemblage. Two or more chip assemblies are produced in each case by cohesively and...
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