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Patent # Description
2017/0271297 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MOUNTING STRUCTURE
A semiconductor device includes a plurality of functional element chips, an electric connection member joined to two of the functional element chips, a first...
2017/0271296 COATED BOND WIRES FOR DIE PACKAGES AND METHODS OF MANUFACTURING SAID COATED BOND WIRES
A method of manufacturing a bond wire having a metal core, a dielectric layer, and a ground connectable metallization, wherein the bond wire has one or more...
2017/0271295 Electronic Device and Method for Producing an Electronic Device
An electronic device and a method for producing an electronic device are disclosed. In an embodiment the electronic device includes a first component and a...
2017/0271294 SPACER PARTICLES FOR BOND LINE THICKNESS CONTROL IN SINTERING PASTES
Methods and compositions are described for controlling bond line thickness of a joint formed during sintering. Spacer particles of a predetermined particle...
2017/0271293 DISPLAY DEVICE
A display device includes: a first substrate; a wire portion disposed on the first substrate; a pad portion connected with the wire portion; a printed circuit...
2017/0271292 HIGH POWER SEMICONDUCTOR PACKAGE SUBSYSTEMS
A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal "coins" having high thermal conductivity...
2017/0271291 Bonded Structures for Package and Substrate
The embodiments described provide elongated bonded structures near edges of packaged structures free of solder wetting on sides of copper posts substantially...
2017/0271290 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF
A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad, and a second bonding pad on a top surface of the...
2017/0271289 PLANAR FAN-OUT WAFER LEVEL PACKAGING
A proposed device may reduce or eliminate a step between a die and a mold compound. Bottom and top surfaces of the die may respectively be the active and...
2017/0271288 Multi-chip package and manufacturing method
Manufacturing method and a multi-chip package, which comprises a conductor pattern and insulation, and, inside the insulation, a first component, the contact...
2017/0271287 Interconnect Structure and Method of Forming Same
A method includes depositing a dielectric layer over a substrate, patterning the dielectric layer to form a first opening and a second opening, wherein a width...
2017/0271286 SEMICONDUCTOR DEVICE CAPABLE OF DISPERSING STRESSES
A semiconductor device includes a semiconductor substrate including a circuit layer disposed therein, a bonding pad disposed on the semiconductor substrate,...
2017/0271285 INTEGRATED CIRCUIT PACKAGE USING POLYMER-SOLDER BALL STRUCTURES AND FORMING METHODS
A conductive polymer-solder ball structure is provided. The conductive polymer-solder ball structure includes a wafer having at least one metal pad providing...
2017/0271284 SEMICONDUCTOR PACKAGE, PRINTED CIRCUIT BOARD SUBSTRATE AND SEMICONDUCTOR DEVICE
A semiconductor package includes: a semiconductor integrated circuit; an interlayer film disposed on the semiconductor integrated circuit; a rewiring layer...
2017/0271283 INTEGRATED FAN-OUT PACKAGE, REDISTRIBUTION CIRCUIT STRUCTURE, AND METHOD OF FABRICATING THE SAME
A redistribution circuit structure electrically connected to at least one conductor underneath is provided. The redistribution circuit structure includes a...
2017/0271282 CIRCUIT BOARD HAVING A GROUND LAYER INCLUDING A PLURALITY OF POLYGONAL OPENINGS
A circuit board includes an insulating layer, a ground layer formed on a first surface of the insulating layer and including a plurality of openings arranged...
2017/0271281 Microwave Monolithic Integrated Circuit (MMIC) Amplified Having de-Q'ing Section With Resistive Via
A microwave amplifier having a field effect transistor formed on an upper surface of a substrate. A de-Q'ing section connected to the field effect transistor...
2017/0271280 SEMICONDUCTOR DEVICE
A semiconductor device includes semiconductor elements and a multilayer substrate including an insulating plate and a circuit board on which the semiconductor...
2017/0271279 PACKAGE INTEGRATED WITH A POWER SOURCE MODULE
A package integrated with a power source module may be provided. The package including a substrate having an upper surface and a lower surface, a chip on the...
2017/0271278 SENSOR CHIP PACKAGE ASSEMBLY AND ELECTRONIC DEVICE HAVING SENSOR CHIP PACKAGE ASSEMBLY
A sensor chip package assembly and an electronic device having the sensor chip package assembly are disclosed, where the sensor chip package assembly includes:...
2017/0271277 PACKAGE ASSEMBLY FOR EMBEDDED DIE AND ASSOCIATED TECHNIQUES AND CONFIGURATIONS
Embodiments of the present disclosure are directed towards a package assembly for embedded die and associated techniques and configurations. In one embodiment,...
2017/0271276 CHIP PACKAGE AND METHOD FOR FORMING THE SAME
A chip package including a substrate that has a first surface and a second surface opposite thereto is provided. The substrate includes a chip region and a...
2017/0271275 POWER SEMICONDUCTOR MODULE
In a power semiconductor module, the 0.2% yield strength of solder under a lead terminal that bonds the lead terminal and a semiconductor element is set to be...
2017/0271274 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Provided is a semiconductor device including an insulating plate; a first conducting portion formed on a first surface of the insulating plate; a semiconductor...
2017/0271273 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device has a configuration in which a stacked assembly and a resin case are combined. The stacked assembly includes a semiconductor element, a...
2017/0271272 FAN-OUT SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SAME
The present disclosure relates to a fan-out semiconductor package including a frame having a through hole, a semiconductor chip disposed in the through hole, a...
2017/0271271 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Embodiments include a semiconductor manufacturing method comprising, providing an object to be processed, the object including a semiconductor element, a...
2017/0271270 SYSTEMS AND METHODS FOR ELOECTROMAGNETIC INTERFERENCE SHIELDING
Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include a substrate...
2017/0271269 OXIDATION RESISTANT BARRIER METAL PROCESS FOR SEMICONDUCTOR DEVICES
An integrated circuit and method comprising an underlying metal geometry, a dielectric layer on the underlying metal geometry, a contact opening through the...
2017/0271268 Semiconductor Device Having a Metal Adhesion and Barrier Structure and a Method of Forming Such a Semiconductor...
According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a semiconductor body and a...
2017/0271267 SEMICONDUCTOR PACKAGING STRUCTURE
A semiconductor packaging structure includes a solder resist layer with a circuit layer embedded therein, a semiconductor element disposed on the solder resist...
2017/0271266 BACKSIDE DRILL EMBEDDED DIE SUBSTRATE
A device and method of fabricating are provided. The device includes a substrate having a first side and an opposite second side, a cavity defined within the...
2017/0271265 SEMICONDUCTOR DEVICE AND WAFER LEVEL PACKAGE INCLUDING SUCH SEMICONDUCTOR DEVICE
An RDL structure on a passivation layer includes a first landing pad disposed directly above a first on-chip metal pad; a first via in a passivation layer to...
2017/0271264 SEMICONDUCTOR PACKAGES WITH EMBEDDED BRIDGE INTERCONNECTS
Semiconductor packages with embedded bridge interconnects, and related assemblies and methods, are disclosed herein. In some embodiments, a semiconductor...
2017/0271263 SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes a wiring layer, an insulating layer, a contact plug, a pillar and a pad. The wiring layer...
2017/0271262 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a substrate includes a first portion and a second portion. The first portion has a columnar configuration. The second portion has...
2017/0271261 THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ANNULAR ETCH-STOP SPACER AND METHOD OF MAKING THEREOF
A method of forming a monolithic three-dimensional memory device includes forming a first alternating stack over a substrate, forming an insulating cap layer,...
2017/0271259 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is...
2017/0271258 HIGH POWER MMIC DEVICES HAVING BYPASSED GATE TRANSISTORS
Monolithic microwave integrated circuits are provided that include a substrate having a transistor and at least one additional circuit formed thereon. The...
2017/0271257 METALLIZATION STACK AND SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME
A metallization stack, comprising: at least an interlayer dielectric layer comprising a dielectric material and a negative capacitance material, wherein: at...
2017/0271256 SEMICONDUCTOR MEMORY DEVICE HAVING A STEPPED STRUCTURE AND CONTACT WIRINGS FORMED THEREON
A semiconductor storage device includes a substrate, a stack of first insulating layers and conductive layers that are alternately formed on the substrate in a...
2017/0271255 INTEGRATED CIRCUIT DEVICE
An integrated circuit device includes a first and a second semiconductor regions, a first electrode provided above the first semiconductor region, a second...
2017/0271254 ELECTRONIC DEVICE WITH DIE BEING SUNK IN SUBSTRATE
A method for forming an electronic device includes embedding an integrated circuit die in a package including substrate of thermally conductive material with...
2017/0271253 PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING AN ELEMENT
The present invention provides a printed circuit board fabricated by a Non-Plating Process that includes at least one plating bar disposed around at least one...
2017/0271252 STACKED SEMICONDUCTOR DEVICE STRUCTURE AND METHOD
A stacked semiconductor device structure includes a first semiconductor device having a first major surface and a second major surface opposite to the first...
2017/0271251 FABRICATION METHOD OF SEMICONDUCTOR SUBSTRATE
A semiconductor substrate is disclosed. The semiconductor substrate includes a substrate body having at least an opening formed on a surface thereof, wherein...
2017/0271250 SEMICONDUCTOR PACKAGE ASSEMBLY
Various structures of a semiconductor package assembly are provided. In one implementation, a semiconductor package assembly includes a redistribution layer...
2017/0271249 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device 1 includes a semiconductor chip 2, a plurality of leads 4, disposed in a periphery of the semiconductor chip 2, and a sealing resin 5,...
2017/0271248 SEMICONDCUTOR PACKAGE AND MANUFACTURING PROCESS THEREOF
A semiconductor package has a first redistribution layer, a first die, a second redistribution layer, and a surface coating layer. The first die is...
2017/0271247 SEMICONDUCTOR DEVICE
A semiconductor device includes first and second conductive layers on a substrate and separated from each other. A first semiconductor chip is mounted on the...
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