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Patent # Description
2017/0278887 IMAGE SENSOR WITH INNER LIGHT-CONDENSING SCHEME
An image sensor may include: a photoelectric conversion layer suitable for converting light into an electrical signal; a spacer layer formed over the...
2017/0278886 OPTICAL DEVICE AND PRODUCTION METHOD FOR OPTICAL DEVICE
A cover (8) of an optical device (10) is divided into: a first cover (5) which is fixed to a side wall section (4) so that an optical window (52) covers a...
2017/0278884 IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME
This technology relates to an image sensor. The image sensor may include a substrate including a photoelectric conversion element; a pillar formed over the...
2017/0278883 TRANSISTOR AND IMAGE SENSOR HAVING THE SAME
An image sensor includes: a light receiving section suitable for generating photocharges in response to incident light; and a driving section including a...
2017/0278882 IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME
A method for fabricating an image sensor in accordance with an embodiment of the inventive concepts may include forming first and second photodiodes within a...
2017/0278881 BSI Image Sensor and Method of Forming Same
A backside illumination (BSI) image sensor and a method of forming the same are provided. A method includes forming a plurality of photosensitive pixels in a...
2017/0278880 Measuring Harvested Energy Using an Ultra-Low Duty Cycle Measurement System
A method for measuring energy harvested from at least one energy source for use in an access control system, comprising providing an access control device...
2017/0278879 METHOD FOR MANUFACTURING METAL LAMINATION FILM, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND METHOD FOR...
The present invention includes: a multilayer film forming step of forming a multilayer film constituted by a plurality of metal films layered together; after...
2017/0278878 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND SEPARATION APPARATUS
A technique is described in which a transistor formed using an oxide semiconductor film, a transistor formed using a polysilicon film, a transistor formed...
2017/0278877 THIN FILM TRANSISTOR SUBSTRATE INCLUDING THIN FILM TRANSISTOR FORMED OF OXIDE SEMICONDUCTOR AND METHOD FOR...
A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel...
2017/0278876 SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
To provide a semiconductor device including a small-area circuit with high withstand voltage, an oxide semiconductor (OS) transistor is used as some of...
2017/0278875 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a...
2017/0278874 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE INCLUDING THE SAME
To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including...
2017/0278873 THIN FILM TRANSISTOR, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE SAME
A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The semiconductor layer overlaps the gate...
2017/0278872 SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING THE SAME
Provided is a semiconductor device including: a first transistor over a substrate, the first transistor having a gate electrode, an oxide semiconductor film,...
2017/0278871 ARRAY SUBSTRATE ASSEMBLY AND TFT DISPLAY APPARATUS COMPRISING THE SAME
Embodiments of the present invention provide an array substrate assembly and a display apparatus including the array substrate assembly. The array substrate...
2017/0278870 FABRICATION OF FINS USING VARIABLE SPACERS
A method of fabricating semiconductor fins, including, patterning a film stack to produce one or more sacrificial mandrels having sidewalls, exposing the...
2017/0278869 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A first semiconductor layer is formed on an insulating surface. A first insulating layer for covering an upper side of the first semiconductor layer is formed....
2017/0278868 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE
The present disclosure provides an array substrate comprising a plurality of gate lines, and a plurality of data lines that intersect the plurality of gate...
2017/0278867 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
A display device may include a substrate, an active pattern layer, a gate insulating layer, a first metal pattern layer, an interlayer insulating layer, a...
2017/0278866 THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A thin film transistor substrate includes: a thin film transistor including: a first insulating film covering a gate electrode; a semiconductor channel layer...
2017/0278865 METHOD OF TUNING SOURCE/DRAIN PROXIMITY FOR INPUT/OUTPUT DEVICE RELIABILITY ENHANCEMENT
A semiconductor device includes a first FinFET device and a second FinFET device. The first FinFET device includes a first gate, a first source, and a first...
2017/0278864 3D NAND DEVICE
A method for forming a 3D NAND structure includes providing a semiconductor substrate; forming a control gate structure having a plurality of staircase-stacked...
2017/0278863 THREE-DIMENSIONAL SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate including a cell array region and a peripheral circuit region. The semiconductor device further includes a cell...
2017/0278862 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device according to an embodiment comprises: a plurality of memory strings arranged in a first direction intersecting a surface of a...
2017/0278861 SEMICONDUCTOR MEMORY DEVICE
According to embodiments, a semiconductor memory device includes a plurality of control gate electrodes laminated on a substrate. A first semiconductor layer...
2017/0278860 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor memory device according to an embodiment comprises: a memory cell array region including a plurality of conductive layers that are electrically...
2017/0278859 THREE-DIMENSIONAL MEMORY DEVICE CONTAINING VERTICALLY ISOLATED CHARGE STORAGE REGIONS AND METHOD OF MAKING THEREOF
A memory opening can be formed through an alternating stack of insulating layers and sacrificial material layers provided over a substrate. Annular etch stop...
2017/0278858 MONOLITHIC 3-D DYNAMIC MEMORY AND METHOD
A monolithic 3-D dynamic memory structure includes independently addressable strings of dual-gate devices. In each dual-gate device charge is deliberately...
2017/0278857 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; a stacked body having a plurality of first insulating layers and...
2017/0278856 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
An MISFET has a gate electrode formed on a semiconductor substrate via a gate insulating film, and a source region and a drain region formed inside the...
2017/0278855 ONE-TIME PROGRAMMING CELL
A one-time programing cell includes a first metal oxide semiconductor (MOS) structure and a second transistor having a common gate electrode electrically...
2017/0278854 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
In a MONOS memory, withstand voltage is increased between a control gate electrode over an ONO film having a charge accumulating part and a semiconductor...
2017/0278853 INTEGRATION OF A MEMORY TRANSISTOR INTO HIGH-K, METAL GATE CMOS PROCESS FLOW
Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method...
2017/0278852 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device according to an embodiment includes: a semiconductor substrata; a plurality of first insulating layers and first conductive...
2017/0278851 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device according to one embodiment includes a stacked body and a semiconductor layer. The stacked body includes a plurality of control...
2017/0278850 PADS AND PIN-OUTS IN THREE DIMENSIONAL INTEGRATED CIRCUITS
A three dimensional semiconductor device, comprising: a substrate including a plurality of circuits; a plurality of pads, each pad coupled to a circuit; and a...
2017/0278849 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device includes the steps of: determining a first design dimension of a gate electrode of a selection MISFET, a...
2017/0278848 Semiconductor Device Having a Memory Cell and Method of Forming the Same
There is provided an apparatus includes a substrate having a main surface, a wordline buried in the substrate and a bitline buried in a shallower area than the...
2017/0278847 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a substrate including a cell area and a background area, the background area surrounding the cell area, a plurality of active...
2017/0278846 SEMICONDUCTOR MEMORY DEVICE HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR
An IC may include an array of memory cells formed in a semiconductor, including memory cells arranged in rows and columns, each memory cell may include a...
2017/0278845 METHOD FOR FABRICATING FIN-SHAPED STRUCTURE AND BUMP MADE OF DIFFERENT MATERIAL
A method for fabricating semiconductor device is disclosed. First, a substrate is provided, a first fin-shaped structure and a bump are formed on the...
2017/0278844 METHODS, APPARATUS AND SYSTEM FOR STI RECESS CONTROL FOR HIGHLY SCALED FINFET DEVICES
At least one method, apparatus and system are disclosed for forming a fin field effect transistor (finFET) having an oxide level in a fin array region within a...
2017/0278843 LARGE AREA DIODE CO-INTEGRATED WITH VERTICAL FIELD-EFFECT-TRANSISTORS
An integrated circuit is provided having a semiconductor structure, the semiconductor structure including a vertical field-effect transistor; and a diode...
2017/0278842 INTEGRATED CIRCUITS INCLUDING A FINFET AND A NANOSTRUCTURE FET
An integrated circuit includes a FinFET and a nanostructure FET. The integrated circuit includes a bulk substrate. The integrated circuit also includes a fin...
2017/0278841 ELECTRONIC DEVICE WITH INTEGRATED GALVANIC ISOLATION, AND MANUFACTURING METHOD OF THE SAME
An electronic device includes a semiconductor body and a dielectric layer extending over the semiconductor body. A galvanic isolation module includes a first...
2017/0278840 ELECTROSTATIC DISCHARGE (ESD) PROTECTION IN AN ELECTRONIC SWITCHING CIRCUIT
Aspects disclosed herein include electrostatic discharge (ESD) protection in an electronic switching circuit. An electronic switching circuit includes...
2017/0278839 ELECTROSTATIC DISCHARGE PROTECTION USING A GUARD REGION
A silicon controlled rectifier (SCR) circuit is configured to shunt electrostatic discharge (ESD) current from a node to a reference voltage. The SCR circuit...
2017/0278838 SENSOR DEVICE
In conventional sensor devices, it has been difficult to achieve both EMC resistance and ESD resistance, which are required at the output terminals of an...
2017/0278837 SEMICONDUCTOR POWER DEVICE HAVING SHIELDED GATE STRUCTURE AND ESD CLAMP DIODE MANUFACTURED WITH LESS MASK PROCESS
A semiconductor power device having shielded gate structure in an active area and having ESD clamp diode with two poly-silicon layer process is disclosed,...
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