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Patent # Description
2017/0278582 Read-Only Memory (ROM) Architecture with Selective Encoding
Embodiments provide improved memory bitcells, memory arrays, and memory architectures. In an embodiment, a memory array includes a plurality of memory cells to...
2017/0278581 MEMORY DEVICE THAT EXECUTES AN ERASE OPERATION FOR A NONVOLATILE MEMORY
According to one embodiment, a memory device includes a controller, and a nonvolatile memory in which an erase operation is controlled by the controller, the...
2017/0278580 NONVOLATILE MEMORY DEVICE INCLUDING PAGE BUFFER AND METHOD FOR VERIFYING PROGRAM OPERATION THEREOF
A nonvolatile memory device may include a cell array, a first page buffer, and a second page buffer. The first page buffer may be connected to a first memory...
2017/0278579 MEMORY DEVICE, MEMORY SYSTEM, AND READ/VERIFY OPERATION METHOD OF THE MEMORY DEVICE
A data read operation method of a memory device includes applying a read voltage having a first preparation level and a first target level to a word line of a...
2017/0278578 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device according to the present invention includes a first memory cell, a second memory cell, a dummy transistor, and a voltage control...
2017/0278577 READ PERFORMANCE OF A NON-VOLATILE MEMORY DEVICE, IN PARTICULAR A NON-VOLATILE MEMORY DEVICE WITH BURIED...
The non-volatile memory device comprises memory cells each comprising a selectable state transistor having a floating gate and a control gate. The state...
2017/0278576 DATA STORAGE DEVICE
According to one embodiment, a data storage device includes a controller driven by a first power supply voltage, a nonvolatile memory controlled by the...
2017/0278575 SEMICONDUCTOR DEVICE
An object of the present disclosure is to provide a semiconductor having high security. A semiconductor device includes: a memory region having a plurality of...
2017/0278574 SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array...
2017/0278573 SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES
Systems, methods, and apparatus are disclosed for implementing memory cells having common source lines. The methods may include receiving a first voltage at a...
2017/0278572 Devices Including Memory Arrays, Row Decoder Circuitries and Column Decoder Circuitries
Some embodiments include a device having an array of memory cells, a memory control unit at least partially under the array, row decoder circuitry in data...
2017/0278571 THREE DIMENSIONAL NAND MEMORY DEVICE WITH COMMON BIT LINE FOR MULTIPLE NAND STRINGS IN EACH MEMORY BLOCK
Two vertical NAND strings can share a common bit line by providing two pairs of drain select transistors. Channels of each vertical NAND string containing an...
2017/0278570 NON-VOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
A non-volatile memory device includes a first floating gate unit, a second floating gate unit, a selecting gate unit and a comparator. The first floating gate...
2017/0278569 Duo Content Addressable Memory (CAM) Using A Single CAM
Disclosed is a content addressable memory (CAM). The content addressable memory array includes a memory array and a data match module. The memory array...
2017/0278568 CROSS-POINT MEMORY COMPENSATION
The apparatuses and methods described herein may operate to measure a voltage difference between a selected access line and a selected sense line associated...
2017/0278567 MULTI-STATE MAGNETIC MEMORY DEVICE
A multi-state MRAM device comprises N overlapping ovals defining a free ferromagnetic region. The size of the free ferromagnetic region is controlled the shape...
2017/0278566 SEMICONDUCTOR STORAGE DEVICE
A semiconductor storage device includes an SRAM memory cell composed of a drive transistor, a transfer transistor and a load transistor, an I/O circuit that is...
2017/0278565 INTELLIGENT BIT LINE PRECHARGE FOR IMPROVED DYNAMIC POWER
A method and apparatus for writing data to a memory device are provided that do not change the precharge states for a bit line pair in a current write cycle if...
2017/0278564 MEMORY WITH KEEPER CIRCUIT
A memory device with a keeper circuit is disclosed herein. The memory device (i) improves current tracking between the device's memory cells and the keeper...
2017/0278563 SENSE AMPLIFIER ENABLING SCHEME
A memory and a method for operating the memory are presented. The memory includes a memory cell, a sense amplifier configured to sense read data from the...
2017/0278562 Techniques to Use Chip Select Signals for a Dual In-Line Memory Module
Examples may include techniques to use chip select signals for a dual in-line memory module (DIMM). In some examples, the chip select signals are used with...
2017/0278561 Enhanced Memory Device
Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a memory cell configured to operate in...
2017/0278560 SEMICONDUCTOR MEMORY DEVICE FOR DECONCENTRATING REFRESH COMMANDS AND SYSTEM INCLUDING THE SAME
A memory device includes a buffer memory configured to receive commands from a memory controller via first to N.sup.th channels, wherein N denotes an integer...
2017/0278559 APPARATUSES AND METHODS FOR DATA MOVEMENT
The present disclosure includes apparatuses and methods for data movement. An example apparatus includes a memory device that includes a plurality of subarrays...
2017/0278558 SEMICONDUCTOR MEMORY DEVICE
Proposed as a configuration, a controlling method, and a testing method for a ferroelectric shadow memory are (1) a bit line non-precharge method, in which no...
2017/0278557 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THE SAME
A method for controlling a magnetic memory device is provided. The method includes: applying a first control signal and a second control signal to a...
2017/0278556 SEMICONDUCTOR MEMORY DEVICE WITH INCREASED OPERATING SPEED
A semiconductor memory device includes a memory cell array comprising a plurality of spin torque transfer-magnetic random access memory (STT-MRAM) cells...
2017/0278555 MEMORY MACRO AND METHOD OF OPERATING THE SAME
A memory macro includes a first memory cell array, a first tracking circuit and a first pre-charge circuit. The first tracking circuit includes a first set of...
2017/0278554 PROVIDING MEMORY TRAINING OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) SYSTEMS USING PORT-TO-PORT LOOPBACKS, AND...
Providing memory training of dynamic random access memory (DRAM) systems using port-to-port loopbacks, and related methods, systems, and apparatuses are...
2017/0278553 SEMICONDUCTOR DEVICE AND OUTPUT CIRCUIT THEREOF
A semiconductor device and an output circuit thereof for accelerating rising of a pull-up transistor are provided. The output circuit of the invention includes...
2017/0278552 SENSE STRUCTURE BASED ON MULTIPLE SENSE AMPLIFIERS WITH LOCAL REGULATION OF A BIASING VOLTAGE
A sense structure may include sense amplifiers each having measuring and reference terminals for receiving a measuring and a reference current, respectively,...
2017/0278551 HERMETIC SEALING WITH HIGH-SPEED TRANSMISSION FOR HARD DISK DRIVE
Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier...
2017/0278550 REPRODUCING DEVICE, REPRODUCING METHOD, INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, PROGRAM,...
The present technology relates to a reproducing device, a reproducing method, an information processing device, an information processing method, a program,...
2017/0278549 DRAWING PROCESSING DEVICE AND METHOD
A drawing processing device includes a processor that executes a process. The process includes: receiving, for any frame out of a plurality of frames included...
2017/0278548 Method and Process for the Production of a Scrapbook Motion Album
A method and multi-step Process in which planning, organizational skills, recording techniques, and manual manipulations are combined with the operation of...
2017/0278547 METHOD OF MODIFYING PLAY OF AN ORIGINAL CONTENT FORM
A method of facilitating modified content play such that modification actions may be implemented during play of original content form. The modification actions...
2017/0278546 METHOD AND DEVICE FOR PROCESSING MULTIMEDIA INFORMATION
A method and an apparatus for processing multimedia information is provided. The method includes receiving a first type of multimedia information collected by...
2017/0278545 MEDIA CONTENT MANIPULATION
Manipulation of media content is described. In one aspect, a media content device can receive input representing one or both of a beginning or end of a...
2017/0278544 EFFICIENT VIDEO ANNOTATION WITH OPTICAL FLOW BASED ESTIMATION AND SUGGESTION
A computer-implemented method is provided for video annotation of a video sequence that includes a plurality of frames. The method includes storing, by a...
2017/0278543 SPEEDY CLIPPING
Provided is a system for efficiently creating snippets or clips from media assets without re-encoding the entire portion of already encoded media content...
2017/0278542 ACTIVE CONTROL OF A READ/WRITE HEAD
The invention generally relates to a hard disk drive with a disk, a read/write head, a z-axis actuator, and a controller. A surface of the disk and/or the head...
2017/0278541 INFORMATION RECORDING METHOD AND INFORMATION RECORDING APPARATUS INCLUDING SWITCHING OF RECORDING LAYER IN...
An information recording method of recording information is provided in an information recording medium having a plurality of recording layers including a...
2017/0278540 MAGNETIC TAPE AND MAGENTIC TAPE DEVICE
The magnetic tape has a timing base servo pattern on the magnetic layer, wherein the centerline average surface roughness Ra on the surface of the magnetic...
2017/0278539 METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR AUDIO RECORDING
A method, apparatus and computer program product are disclosed. The method includes acquiring an instruction, picking up an audio signal with an electronic...
2017/0278538 MITIGATION OF LASER POWER VARIATION INDUCED PHASE SHIFT IN HEAT ASSISTED MAGNETIC RECORDING SYSTEMS
A system for compensating for heat induced transient phase shift in a heat assisted magnetic recording system. A heat assisted magnetic data recording system...
2017/0278537 CONTENT PLAYBACK APPARATUS, CONTENT PLAYBACK SYSTEM, CONTENT INFORMATION PROGRAM, AND CONTENT PLAYBACK METHOD
A content reproduction apparatus includes: an information receiving unit that receives first information from a first user terminal capable of providing a...
2017/0278536 DISC DEVICE
A disc device includes a first traverse chassis holding a first optical pickup unit which performs recording/reproduction of information on a first surface of...
2017/0278535 LIBRARY DEVICE, CARTRIDGE JUMP-OUT PREVENTING MECHANISM AND METHOD
A library device includes: a housing for accommodating a magazine to be able to be put in and out, wherein the magazine has slots for accommodating recording...
2017/0278534 OPTICAL INFORMATION RECORDING APPARATUS AND METHOD
An optical information recording apparatus and method thereof for recording information in a holographic medium. The apparatus includes a laser source which...
2017/0278533 MAGNETIC TAPE AND MAGNETIC TAPE DEVICE
The magnetic tape has a magnetic layer containing ferromagnetic powder and binder on a nonmagnetic support, wherein a timing based servo pattern is present on...
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