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Patent # Description
2017/0300464 Animating Edits to Documents
A notes system is presented with a content management system. The notes system manages creation and distribution of edits to notes to users sharing the notes....
2017/0300463 AUTOMATED CONTENT INJECTION
A system and method for automated customization are disclosed herein. The system includes a content distribution network formed of a content network, an...
2017/0300462 INPUTTING IMAGES TO ELECTRONIC DEVICES
A computing device is described which has a memory storing text input by a user. The computing device has a processor which is configured to send the text to a...
2017/0300461 Representation of an Interactive Document as a Graph of Entities
Techniques for representing and publishing an interactive document useful for analyzing data. The document may be represented as a directed acyclic graph of...
2017/0300460 METHOD AND SYSTEM FOR IMPLEMENTING CONTEXT BASED DISPLAY OF OBJECTS IN WEB APPLICATIONS USING LINK RELATIONSHIPS
In general, the technology relates to a method for displaying objects on a webpage. The method includes receiving a request to transition to the webpage in a...
2017/0300459 CARD-TYPE DESKTOP IMPLEMENTATION METHOD AND APPARATUS
The present invention provides card-type desktop implementation methods and apparatuses. One method embodiment includes: providing, by a desktop module, a...
2017/0300458 Embedding Dynamic Content Item Preview
A content management system including a document management system provides documents that include previews of folders in the content management system. The...
2017/0300457 CONTENT PRESENTATION BASED ON USER INTERACTION IN A FLIP-BASED DIGITAL MAGAZINE ENVIRONMENT
A digital magazine presents content items based on user interaction with or preference for content items determined based on how a user flips through different...
2017/0300456 RESOURCE SIZE-BASED CONTENT ITEM SELECTION
Systems and methods for automatically determining a content item size may be based on a size of a viewport and a width of a parent element. A script may be...
2017/0300455 EFFICIENT HARDWARE INSTRUCTIONS FOR SINGLE INSTRUCTION MULTIPLE DATA PROCESSORS
A method and apparatus for efficiently processing data in various formats in a single instruction multiple data ("SIMD") architecture is presented. ...
2017/0300454 ANALOG PROCESSOR COMPRISING QUANTUM DEVICES
Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a...
2017/0300453 SYSTEM AND METHOD OF PROVIDING NOTIFICATION OF SUSPICIOUS ACCESS ATTEMPTS
A system and method of preventing access to user information on a network is provided. In one aspect, if a request for information from one node is suspicious,...
2017/0300452 INTEGRATED DATA CONCENTRATOR FOR MULTI-SENSOR MEMS SYSTEMS
An integrated data concentrator, so-called "sensor hub", for a multi-sensor MEMS system, implements: a first interface module, for interfacing, in a normal...
2017/0300451 Systems and Methods for Channel Information Exchange in a PCIe Environment
Embodiments are related to systems and methods for data transfer, and more particularly to systems and methods for providing non-standard bus information.
2017/0300450 Manually Configurable PCIe Lane Count for PCIe SSD Backplane
A configurable rack server backplane that provides either two-lane or four-lane PCIe bus connections at each the individual drive bays supported by the...
2017/0300449 METHOD FOR POWER CONTROL HANDSHAKING OF HOT SWAPPABLE COMPONENTS USING PROGRAMMABLE LOGIC DEVICES
A system and methodology for effectively managing, without interrupting the overall system, the power and control logic of the system during the removal,...
2017/0300448 SEMICONDUCTOR DEVICE AND MEMORY SYSTEM
A semiconductor device capable of communicating with a host apparatus includes a symbol generation unit, a coding unit, and a transmission unit. The symbol...
2017/0300447 SYSTEM ON A CHIP HAVING HIGH OPERATING CERTAINTY
The invention concerns a system on a chip (100) comprising a set of master modules which includes a main processing module (101a) and a direct memory access...
2017/0300446 Concurrent Maintenance of Modular PCIe I/O Expansion Drawer
An approach is provided in which a host system receives a request to power down a selected I/O module located in a PCIe I/O expansion drawer. The host system...
2017/0300445 STORAGE ARRAY WITH MULTI-CONFIGURATION INFRASTRUCTURE
A storage array and systems for configuring a storage array are provided. In one example, the storage array includes a motherboard. The motherboard includes a...
2017/0300444 Message Translator
Systems, methods, circuits and computer-readable mediums for a network message translator are disclosed. In an embodiment, a device includes a host processor...
2017/0300443 SYSTEMS, APPARATUS, AND METHODS FOR EFFICIENT SPACE TO TIME CONVERSION OF OTU MULTIPLEXED SIGNAL
Methods and apparatuses for data transformation are disclosed. An exemplary apparatus includes a first memory, a second memory, a cross-bar switch...
2017/0300442 HOT PLUG METHOD AND DEVICE FOR BYTE ADDRESSABLE PERSISTENT MEMORY
The invention provides a hot plug method and device for a byte-addressable persistent memory, which includes hot-add and hot-remove; wherein the hot-add...
2017/0300441 HDMI AND DP COMPATIBLE INTERFACE CIRCUIT
An interface circuit providing compatibility between HDMI and DP display devices includes a interface, a signal transmitting chip, and a signal transmitting...
2017/0300440 ACCESSORY DEVICE FOR AN ELECTRONIC PROTECTION RELAY
An accessory device for an electronic protection relay comprising: a first communication port for communication with one or more electronic devices of the...
2017/0300439 SERIAL COMMUNICATION SAFETY CONTROLLER
Serial communication verification and safety control is disclosed. A multi-part system such as a battery management system can include distributed or...
2017/0300438 Method and Apparatus for a Segmented On-Chip Digital Interface Block
A method and architecture for operating with distributed (or segmented) on-chip digital interfaces such as the Inter-Integrated Circuit protocol and a Serial...
2017/0300437 SERVICE ACCELERATION METHOD AND APPARATUS
A service acceleration method is disclosed. The method includes: querying acceleration type information and information about an idle acceleration ability that...
2017/0300436 SAN FABRIC ONLINE PATH DIAGNOSTICS
A diagnostic testing utility is used to perform online path diagnostic tests to troubleshoot components in a path that contribute to performance degradations...
2017/0300435 DIRECT MEMORY ACCESS CONTROL DEVICE FOR AT LEAST ONE COMPUTING UNIT HAVING A WORKING MEMORY
A direct memory access control device for at least one computing unit includes a terminal for connecting the direct memory access control device to a bus...
2017/0300434 EMI MITIGATION ON HIGH-SPEED LANES USING FALSE STALL
Methods and apparatus relating to techniques for Electromagnetic Interference (EMI) mitigation on high-speed lanes using false stall are described. In one...
2017/0300433 TRANS-FABRIC INSTRUCTION SET FOR A COMMUNICATION FABRIC
A memory controller of a sender node issues an instruction of a trans-fabric instruction set of instructions to a receiver node across a communication fabric...
2017/0300432 CONTROL APPARATUS, RELAY APPARATUS, CONTROL METHOD FOR CONTROL APPARATUS, CONTROL METHOD FOR RELAY APPARATUS,...
Provided is a control apparatus that can correctly obtain the execution status information of the instruction whose sender is the control apparatus itself. The...
2017/0300431 COMPUTER DEVICE AND CONFIGURATION AND MANAGEMENT METHOD OF COMPUTER DEVICE
According to the computer device and the configuration and management method of a computer device that are provided in the embodiments of the present...
2017/0300430 Techniques for Protecting Memory Pages of a Virtual Computing Instance
Mechanisms to protect the integrity of memory of a virtual machine are provided. The mechanisms involve utilizing certain capabilities of the hypervisor...
2017/0300429 Determining Whether a Data Storage Is Encrypted
A method, program and/or system reads first data through a first path from a location in a data storage. Second data is read through a second path from the...
2017/0300428 METHODS AND SYSTEMS FOR SELECTIVE ENCRYPTION AND SECURED EXTENT QUOTA MANAGEMENT FOR STORAGE SERVERS IN CLOUD...
Methods and systems for selective encryption and secured extent quota management for storage servers in cloud computing are provided. A method includes...
2017/0300427 MULTI-PROCESSOR SYSTEM WITH CACHE SHARING AND ASSOCIATED CACHE SHARING METHOD
A multi-processor system with cache sharing has a plurality of processor sub-systems and a cache coherence interconnect circuit. The processor sub-systems have...
2017/0300426 READ CACHE MANAGEMENT METHOD AND APPARATUS BASED ON SOLID STATE DRIVE
A read cache management method and apparatus based on a solid state drive, and the method includes: determining whether a read request hits a first queue and a...
2017/0300425 TRANSLATION LOOKASIDE BUFFER SWITCH BANK
Example devices are disclosed. For example, a device may include a processor, a plurality of translation lookaside buffers, a plurality of switches, and a...
2017/0300424 EFFICIENT METADATA IN A STORAGE SYSTEM
A method for managing metadata in a storage system is disclosed. The system includes a processor, a storage medium, a first metadata table that maps every data...
2017/0300423 WEAR LEVELING IN STORAGE DEVICES
A system may include a plurality of memory cells and a processor. The plurality of memory cells may include a plurality of physical locations at which data is...
2017/0300422 MEMORY DEVICE WITH DIRECT READ ACCESS
Several embodiments of memory devices with direct read access are described herein. In one embodiment, a memory device includes a controller operably coupled a...
2017/0300421 Hybrid Tracking of Transaction Read and Write Sets
Tracking a processor instruction is provided to limit a speculative mis-prediction. A non-speculative read set indication and/or write set indication are...
2017/0300420 NO-LOCALITY HINT VECTOR MEMORY ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode a no-locality hint vector memory access instruction. The...
2017/0300419 MEMORY ACCESS METHOD, STORAGE-CLASS MEMORY, AND COMPUTER SYSTEM
A memory access method, a storage-class memory, and a computer system are provided. The computer system includes a memory controller and a hybrid memory, and...
2017/0300418 DYNAMIC POWERING OF CACHE MEMORY BY WAYS WITHIN MULTIPLE SET GROUPS BASED ON UTILIZATION TRENDS
A set associative cache memory comprises an M.times.N memory array of storage entries arranged as M sets by N ways, both M and N are integers greater than one....
2017/0300417 Multi-Way Set Associative Cache and Processing Method Thereof
A multi-way set associative cache and a processing method thereof, where the cache includes M pipelines, a controller, and a data memory, where any one of the...
2017/0300416 ARITHMETIC PROCESSING APPARATUS AND CONTROL METHOD OF THE ARITHMETIC PROCESSING APPARATUS
An arithmetic processing apparatus includes a prefetch unit configured to send a prefetch request to a subordinate cache memory for prefetching data of a main...
2017/0300415 ASYMMETRICAL MEMORY MANAGEMENT
Described herein are embodiments of asymmetric memory management to enable high bandwidth accesses. In embodiments, a high bandwidth cache or high bandwidth...
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