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Patent # Description
2017/0309757 MULTI-WAVELENGTH DETECTOR ARRAY INCORPORATING TWO DIMENSIONAL AND ONE DIMENSIONAL MATERIALS
A method of forming a wavelength detector that includes forming a first transparent material layer having a uniform thickness on a first mirror structure, and...
2017/0309756 SEMICONDUCTOR PACKAGE, SENSOR MODULE, AND PRODUCTION METHOD
The present disclosure relates to a semiconductor package, a sensor module, and a production method for dissipating heat generated by a chip. In a solid-state...
2017/0309755 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor device includes a semiconductor substrate including a main surface, an element separation film formed over the main surface, and a fin...
2017/0309754 OXIDE SEMICONDUCTOR FILM AND SEMICONDUCTOR DEVICE
An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide...
2017/0309753 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device...
2017/0309752 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A highly reliable semiconductor device is provided. The semiconductor device includes a first barrier insulating film; a first gate electrode thereover; a...
2017/0309751 SEMICONDUCTOR DEVICE
A highly reliable semiconductor device including an oxide semiconductor is provided by preventing a change in its electrical characteristics. A semiconductor...
2017/0309750 SEMICONDUCTOR DEVICE
A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is...
2017/0309749 CRYSTALLIZATION METHOD FOR OXIDE SEMICONDUCTOR LAYER, SEMICONDUCTOR DEVICE MANUFACTURED USING THE SAME, AND...
A method for manufacturing a semiconductor device is discussed. The method includes forming a gate electrode on a substrate, forming a gate insulating film...
2017/0309748 METHOD FOR IMPROVING TRANSISTOR PERFORMANCE
A method to improve transistor performance uses a wafer (100) of single-crystalline semiconductor with a first zone (102) of field effect transistors (FETs)...
2017/0309747 SYSTEM AND METHOD FOR THRESHOLD LOGIC WITH ELECTROSTATICALLY FORMED NANOWIRE TRANSISTORS
An electrostatically formed nanowire transistor, includes a source, a drain, and multiple gates surrounding a doped silicon region. The gates include a top...
2017/0309746 SEMICONDUCTOR PACKAGING STRUCTURE AND SEMICONDUCTOR POWER DEVICE THEREOF
A semiconductor packaging structure includes a chip, a first pin, a second pin, and a third pin. The chip includes a first surface, a second surface, a first...
2017/0309745 HIGH VOLTAGE DEVICE WITH LOW RDSON
High voltage devices and methods for forming a high voltage device are disclosed. The method includes providing a substrate having top and bottom surfaces. The...
2017/0309744 P-CHANNEL DEMOS DEVICE
A p-channel drain extended metal oxide semiconductor (DEPMOS) device includes a doped surface layer at least one nwell finger defining an nwell length and...
2017/0309743 TRENCH DMOS TRANSISTOR WITH REDUCED GATE-TO-DRAIN CAPACITANCE
A trench DMOS transistor with a very low on-state drain-to-source resistance and a high gate-to-drain charge includes one or more floating islands that lie...
2017/0309742 Lateral MOSFET with Dielectric Isolation Trench
A lateral trench MOSFET comprises an insulating layer buried in a substrate, a body region in the substrate, an isolation region in the substrate, a first...
2017/0309741 ILLUMINATION APPARATUS
A point light source is converted into a plane light source having a satisfactory uniformity. The point light source is converted into a line light source by...
2017/0309740 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a...
2017/0309739 Semiconductor Device Having First and Second Circuits Integrated in a Semiconductor Body
A semiconductor device includes at least one wiring layer disposed on a semiconductor body, a field effect transistor integrated in the semiconductor body, the...
2017/0309738 VERTICALLY STRUCTURED POWER TRANSISTOR WITH TRENCH SUPPLY ELECTRODE
The invention relates to a vertically structured power transistor, such as a VD-MOS or an IGBT, having a cell comprising: two symmetrical source layers (308),...
2017/0309737 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor on a substrate, a second semiconductor layer formed of a nitride...
2017/0309736 GAN-BASED POWER ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME
A GaN-based power electronic device and a method for manufacturing the same is provided. The GaN-based power electronic device comprising a substrate and an...
2017/0309735 TECHNIQUES FOR FORMING CONTACTS TO QUANTUM WELL TRANSISTORS
Techniques are disclosed for providing a low resistance self-aligned contacts to devices formed in a semiconductor heterostructure. The techniques can be used,...
2017/0309734 EXTREME HIGH MOBILITY CMOS LOGIC
A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS...
2017/0309733 METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICONDUCTOR ELEMENTS
The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate...
2017/0309732 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Provided is a semiconductor device having favorable reliability. A manufacturing method of a semiconductor device comprising the steps of: forming a first...
2017/0309731 SEPARATION METHOD AND MANUFACTURING METHOD OF FLEXIBLE DEVICE
A low-cost separation method with high mass productivity is provided. A first layer with a thickness of 0.1 .mu.m or more and 3 .mu.m or less can be formed by...
2017/0309730 Apparatus and Method for FinFETs
A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region...
2017/0309729 GATE PLANARITY FOR FINFET USING DUMMY POLISH STOP
A method for forming a semiconductor device includes depositing a dielectric layer over fins formed in a semiconductor substrate. The dielectric layer includes...
2017/0309728 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
In a process of implanting ions of an n-type impurity for threshold control into a semiconductor substrate surrounded by an element isolation portion, a resist...
2017/0309727 MANUFACTURING METHOD OF PATTERNED STRUCTURE OF SEMICONDUCTOR
A method of fabricating a patterned structure of a semiconductor device includes the following steps: providing a substrate having a target layer thereon;...
2017/0309726 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
A semiconductor device includes a substrate, a source/drain region, an etch stop layer, an oxide layer, an interlayer dielectric layer, and a contact plug. The...
2017/0309725 SEMICONDUCTOR DEVICE AND FORMATION THEREOF
A semiconductor device and methods of formation are provided. The semiconductor device includes a gate over a channel portion of a fin. The fin includes a...
2017/0309724 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE TO PREVENT DEFECTS
A method of manufacturing a semiconductor device includes forming dummy gate structures including a dummy gate insulating layer and dummy gate electrodes, on a...
2017/0309723 STRUCTURES AND METHODS FOR EQUIVALENT OXIDE THICKNESS SCALING ON SILICON GERMANIUM CHANNEL OR III-V CHANNEL OF...
A method of forming a semiconductor device that includes forming a metal oxide material on a III-V semiconductor channel region or a germanium containing...
2017/0309722 SEMICONDUCTOR DEVICE HAVING METAL GATE STRUCTURE
A metal gate transistor includes a substrate, a metal gate on the substrate, and a source/drain region in the substrate adjacent to the metal gate. The metal...
2017/0309721 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
The reliability of a semiconductor device is increased by suppression of a variation in electric characteristics of a transistor as much as possible. As a...
2017/0309720 Carbon Based Contact Structure for Silicon Carbide Device Technical Field
A method of forming a contact structure includes providing a silicon-carbide substrate having a highly doped silicon-carbide contact region formed in the...
2017/0309719 HORIZONTAL GATE ALL AROUND DEVICE NANOWIRE AIR GAP SPACER FORMATION
The present disclosure provides an apparatus and methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures...
2017/0309718 LOADING EFFECT REDUCTION THROUGH MULTIPLE COAT-ETCH PROCESSES
First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The...
2017/0309717 SEMICONDUCTOR DEVICE
The bottom surface of the trench is provided so that a center part of the bottom surface protrudes upward with respect to a peripheral part of the bottom...
2017/0309716 SEMINCONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
A semiconductor device includes a semiconductor substrate in which a semiconductor element is provided and a covering insulation film provided on the...
2017/0309714 METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH A GATE CONTACT POSITIONED ABOVE THE ACTIVE REGION
One illustrative method disclosed includes, among other things, forming an initial conductive source/drain structure that is conductively coupled to a...
2017/0309713 Semiconductor Device Having Stripe-Shaped Gate Structures and Spicular or Needle-Shaped Field Electrode Structures
A semiconductor device includes a pair of stripe-shaped gate structures formed lengthwise in parallel in a first surface of a semiconductor body and extending...
2017/0309712 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a first semiconductor layer formed over the substrate, a second semiconductor layer formed over the first...
2017/0309711 INSULATED GATE SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
An insulated gate silicon carbide semiconductor device includes: a drift layer of a first conductivity type on a silicon carbide substrate of 4H type with a...
2017/0309710 INTEGRATED GRAPHITE-BASED STRUCTURE
A structure is provided that comprises a substrate, a plurality of elements, and a plurality of trenches disposed on the substrate. Each element is separated...
2017/0309709 SUBSTRATE STRUCTURE WITH EMBEDDED LAYER FOR POST-PROCESSING SILICON HANDLE ELIMINATION
The present disclosure relates to a substrate structure with a buried dielectric layer for post-processing silicon handle elimination. The substrate structure...
2017/0309708 FIELD EFFECT TRANSISTOR
A field effect transistor is provided in the present invention with an active area including a source region, a drain region, and a channel region. The width...
2017/0309707 Semiconductor Device Including a Semiconductor Sheet Interconnecting a Source Region and a Drain Region
A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is...
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