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Patent # Description
2017/0317712 RATE LINE SUPPRESSION USING CHAOTIC SPREADING CODES
A system, method, and computer program product for chaotically generating a pseudorandom number sequence, such as for use in spread spectrum communications...
2017/0317711 RADIO FREQUENCY MULTIPLEXER
A method and apparatus for routing transmit and receive signals in a radio RF front end. According to one aspect, the disclosure provides a multiplexer method...
2017/0317710 SHIELDED DIVERSITY RECEIVE MODULE
Described herein are radio-frequency (RF) modules that include shielding for improved RF performance. The RF modules including a packaging substrate with a...
2017/0317709 Information Handling System Antenna Sharing with Distributed Tuning Control
A portable information handling system having plural radios, each radio having a dedicated antenna and interfaced with a common shared antenna. A controller...
2017/0317708 RADIO COMMUNICATION APPARATUS, AND RADIO COMMUNICATION METHOD
Wireless communication wherein channel estimation accuracy is improved while keeping the position of each bit in a frame, even when a modulation system having...
2017/0317707 DROP COUNTERMEASURES FOR ELECTRONIC DEVICE
An electronic device comprises a housing, a motion sensor configured to sense motion of the housing, and a processor configured to determine an impact geometry...
2017/0317706 Car Onboard Speech Processing Device
The present invention provides a speech processing device with which it is possible to achieve smooth communication between the passengers of a host vehicle...
2017/0317705 SYSTEM AND METHOD FOR DISPLAYING DIGITAL IMAGERY ON A DIGITAL IMAGERY DISPLAY LOCKET
A digital imagery display locket includes a locket case having a housing and an openable cover attached to the housing, a display configured to display digital...
2017/0317704 METHOD AND APPARATUS FOR OBTAINING CHANNEL INFORMATION IN POLARIZATION DIVISION DUPLEX SYSTEMS
A method and an apparatus for acquiring channel information in a polarization division duplex system. An uplink signal transmitted from a terminal is received,...
2017/0317703 METHOD AND APPARATUS FOR CANCELLING INTERFERENCE AND RECEIVING SIGNAL IN WIRELESS COMMUNICATION SYSTEM
A method for cancelling interference and receiving a signal by a user equipment in a wireless communication system, the method includes identifying assistance...
2017/0317702 METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT IMPROVING REGISTRATION WITH REAL TIME LOCATION SERVICES
An example disclosed method for registering an unregistered radio frequency (RF) location tag carried by a participant includes receiving blink data from an...
2017/0317701 DESIGNING FIR FILTERS WITH GLOBALLY MINIMAX-OPTIMAL MAGNITUDE RESPONSE
Embodiments of the present disclosure provide mechanisms that enable designing an FIR filter that would have a guaranteed globally optimal magnitude response...
2017/0317700 WIRELESS COMMUNICATION CONTROL SYSTEM, WIRELESS COMMUNICATION CONTROL APPARATUS, AND METHOD FOR CONTROLLING...
Provided is a wireless communication control system including a control apparatus that controls driving of one or more driving devices in accordance with a...
2017/0317699 COMPENSATION PARAMETER AND PREDISTORTION SIGNAL
A controller can include a signal generator configured to provide an input signal to a modulator. The controller can be configured to generate a modulator...
2017/0317698 POWER COMBINING POWER AMPLIFIER ARCHITECTURES AND METHODS
Systems and methods are provided for implementing and using a transceiver with multiple transmission paths. Performance may be monitored in at least one of the...
2017/0317697 TRANSMITTER, SIGNAL SYNTHESIS CIRCUIT, AND SIGNAL SYNTHESIS METHOD
A multi-bit digital signal that is generated by modulating a baseband signal by a modulation circuit and includes components in a radio frequency band is...
2017/0317696 RECEIVING A PLURALITY OF RADIO FREQUENCY BANDS
A radio frequency receiver having a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of...
2017/0317695 METHODS AND DEVICES FOR ERROR CORRECTING CODES DECODING
Embodiments of the invention provide a check node processing unit implemented in a decoder, said decoder being configured to decode a signal encoded using an...
2017/0317694 ENCODING AND DECODING METHOD OF LOW-DENSITY PARITY-CHECK CODE
An encoding and decoding method of low-density parity-check code is disclosed. The method is following steps: a high rate check code is transferred to a check...
2017/0317693 FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY
A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one ...
2017/0317692 SLIDING WINDOW LIST DECODER FOR ERROR CORRECTING CODES
A system for hardware error-correcting code (ECC) detection or correction of a received codeword from an original codeword includes an error-detecting circuit...
2017/0317691 HARDWARE-ASSISTED PROTECTION FOR SYNCHRONOUS INPUT/OUTPUT
Examples of techniques for hardware assisted data protection are disclosed. In one example implementation according to aspects of the present disclosure, a...
2017/0317690 Ratio-Metric Self-Capacitance-to-Code Convertor
A circuit, system, and method for converting self capacitance to a digital value may include a pair of charge transfer circuits, each including a deadband...
2017/0317688 EFFICIENT ADAPTIVE SEISMIC DATA FLOW LOSSLESS COMPRESSION AND DECOMPRESSION METHOD
An efficient adaptive seismic data flow lossless compression and decompression method, which aims at solving the problem that data occupies the storage space...
2017/0317687 METHOD FOR PROCESSING A MEASURED-VALUE SIGNAL DETERMINED IN AN ANALOG MANNER, A RESOLVER SYSTEM FOR...
In method for processing a measured-value signal determined in an analog manner and a resolver system for implementing the method, the measured-value signal...
2017/0317686 SIGNAL MODULATION FOR RADIOFREQUENCY COMMUNICATIONS
A signal modulation device comprising: an input for receiving a complex input signal (106) comprising an in-phase component signal and a quadrature-phase...
2017/0317685 DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER TOPOLOGY WITH IMPROVED DISTORTION PERFORMANCE
A delta-sigma Analog-to-Digital Converter (ADC) (IC) which includes an input feed-forward path extending from an input to the ADC to a feed-forward summing...
2017/0317684 WIRELESS-TRANSMITTER CIRCUITS INCLUDING POWER DIGITAL-TO-AMPLITUDE CONVERTERS
Circuits comprising: digital-to-amplitude converter (DAC), comprising: binary weighted switching transistors (BWSTs), each having gate coupled to amplitude...
2017/0317683 TECHNIQUES FOR POWER EFFICIENT OVERSAMPLING SUCCESSIVE APPROXIMATION REGISTER
Systems and methods are disclosed for a noise-shaping successive approximation register (SAR) analog-to-digital-converter (ADC) using Sampled Analog Technology...
2017/0317682 CONTROL APPARATUS
A control apparatus includes, for at least two-phase signals detected from a resolver excited by a carrier signal having a carrier frequency fc, a first phase...
2017/0317681 TIME-FREQUENCY DEVIATION COMPENSATION METHOD, AND USER TERMINAL
Embodiments of the present invention disclose a time-frequency deviation compensation method, and a user terminal. A temperature compensation exception can be...
2017/0317680 RATIOED LOGIC WITH A HIGH IMPEDANCE LOAD
A device having ratioed logic with a high impedance load is described. The device includes a pull-down network coupled between a first voltage and an output....
2017/0317679 RECONFIGURABLE PROCESSOR AND OPERATION METHOD THEREFOR
Provided are a reconfigurable processor and a method of operating the same, the reconfigurable processor including: a configurable memory configured to receive...
2017/0317678 OVERLAY ARCHITECTURE FOR PROGRAMMING FPGAS
An overlay architecture and an associated method that uses datapath merging to provide minimal-overhead support for multiple source netlists, and optionally...
2017/0317677 SYSTEMS AND METHODS FOR ENHANCING CONFIDENTIALITY VIA LOGIC GATE ENCRYPTION
Presented are systems and methods that allow hardware designers to protect valuable IP and information in the hardware domain in order to increase overall...
2017/0317676 SEMICONDUCTOR CIRCUIT
A semiconductor circuit includes a first circuit, a second circuit, a third circuit, and a fourth circuit. The first circuit determines a value of a first node...
2017/0317675 LOW POWER MULTILEVEL DRIVER
A driver for transmitting multi-level signals on a multi-wire bus is described that includes at least one current source connected to a transmission line, each...
2017/0317674 Gate Energy Recovery
Embodiment of the inventive subject matter include an apparatus comprising a first switch, a second switch, a third switch, and a transistor. The first switch...
2017/0317673 System for Controlling Power Device
The present disclosure provides a system for controlling a power device including one or more power elements, one or more drive modules configured to provide a...
2017/0317672 Power-On-Reset Circuit
Various implementations described herein are directed to a circuit. The circuit may include a memory circuit having a first latch. The circuit may include a...
2017/0317671 SEMICONDUCTOR DEVICE
A semiconductor device includes a boot-up start signal generation unit configured to generate a boot-up start signal which is enabled in synchronization with a...
2017/0317670 ELECTRONIC SWITCH, AND CORRESPONDING DEVICE AND METHOD
A high-voltage electronic switch includes first and second transistors defining a current flow path between an input and output of the switch. The transistors...
2017/0317669 SEMICONDUCTOR DEVICE
The semiconductor device according to one embodiment includes a power transistor and a sense transistor connected in parallel with each other, a first...
2017/0317668 Method and Apparatus for an Active Negative-Capacitor Circuit to Cancel the Input Capacitance of Comparators
A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the...
2017/0317667 DEVICE AND METHOD FOR CONTROLLING SLEW RATE
A slew rate control device for controlling a slew rate, includes: a setting part configured to set a voltage value used to determine the slew rate, and a...
2017/0317666 FLIP-FLOP WITH DELINEATED LAYOUT FOR REDUCED FOOTPRINT
In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes master...
2017/0317665 Square Pulse Optical Transmission Circuit
An optical emission circuit includes a power supply source and a regulation circuit coupled to control the power supply source. An optical source and a first...
2017/0317664 SEMICONDUCTOR DEVICE
First and second circuits, a photocoupler and a substrate temperature monitor circuit are formed on a substrate. A photocoupler includes a primary-side light...
2017/0317663 Signal Processing Method and Apparatus
Embodiments of the present invention provide a signal processing method and apparatus. The method includes: performing M-way filtering on an input signal to...
2017/0317662 Resonator And Filter With Resonator
A resonator, in particular a high-frequency resonator, includes a resonator housing with a resonator space formed therein and a container with a cavity in...
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