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| Patent # | Description |
|---|---|
| 2017/0317205 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A method for manufacturing a semiconductor device is provided, including forming a plurality of fins on a semiconductor substrate, and forming source/drain... |
| 2017/0317204 |
SEMICONDUCTOR DEVICE WITH SURROUNDING GATE TRANSISTOR (SGT) An SGT production method includes a first step of forming a fin-shaped semiconductor layer and a first insulating film; a second step of forming a second... |
| 2017/0317203 |
SEMICONDUCTOR QUANTUM DOT DEVICE AND METHOD FOR FORMING A SCALABLE LINEAR
ARRAY OF QUANTUM DOTS An exemplary quantum dot device can be provided, which can include, for example, at least three conductive layers and at least two insulating layers... |
| 2017/0317202 |
SEMICONDUCTOR DEVICE WITH SELECTIVELY ETCHED SURFACE PASSIVATION A semiconductor device includes a semiconductor substrate configured to include a channel, a gate supported by the semiconductor substrate to control current... |
| 2017/0317201 |
SINGLE-ELECTRON TRANSISTOR WITH WRAP-AROUND GATE Transistors and methods of forming the same include forming a fin that has an active layer between two sacrificial layers. Material from the two sacrificial... |
| 2017/0317200 |
SINGLE-ELECTRON TRANSISTOR WITH WRAP-AROUND GATE Transistors and methods of forming the same include forming a fin having an active layer between two sacrificial layers. A dummy gate is formed over the fin.... |
| 2017/0317199 |
SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING SAME A semiconductor device according to an embodiment includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second... |
| 2017/0317198 |
METHOD FOR MANUFACTURING A BIPOLAR JUNCTION TRANSISTOR Embodiments provide a method for manufacturing a bipolar junction transistor, comprising: providing a semiconductor substrate comprising a buried layer of a... |
| 2017/0317197 |
BIPOLAR JUNCTION TRANSISTOR LAYOUT STRUCTURE A bipolar junction transistor layout structure includes a first emitter including a pair of first sides and a pair of second sides, a pair of collectors... |
| 2017/0317196 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE A manufacturing method of a semiconductor device in which the threshold voltage is adjusted is provided. The semiconductor device includes a first... |
| 2017/0317195 |
METHOD FOR FABRICATING METALLIC OXIDE THIN FILM TRANSISTOR A method for fabricating a metal oxide thin film transistor comprises the steps of: selecting a substrate and fabricating a gate electrode on the substrate;... |
| 2017/0317194 |
METHOD OF FORMING A GERMANIUM OXYNITRIDE FILM A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride... |
| 2017/0317193 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure,... |
| 2017/0317192 |
SELECTIVELY DEPOSITED SPACER FILM FOR METAL GATE SIDEWALL PROTECTION A method of fabricating a fin field-effect transistor (FinFET) device is provided. The method includes forming a carbon-based layer on a plurality of gate... |
| 2017/0317191 |
FinFETs with Vertical Fins and Methods for Forming the Same In a method for forming a device, a (110) silicon substrate is etched to form first trenches in the (110) silicon substrate, wherein remaining portions of the... |
| 2017/0317190 |
METHOD FOR FABRICATING LIGHTLY DOPED DRAIN AREA, THIN FILM TRANSISTOR AND
ARRAY SUBSTRATE Embodiments of the disclosure provide a method for fabricating a lightly doped drain area, a thin film transistor, and a thin film transistor array substrate.... |
| 2017/0317189 |
THIN FILM TRANSISTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME A thin film transistor (TFT) structure is provided herein, which comprises a substrate, a light-shielding resin, a polysilicon, a gate electrode insulator, a... |
| 2017/0317188 |
FILM FORMING APPARATUS HAVING AN INJECTOR A thin film forming apparatus includes: an injector, the injector including: a distributor including a first distribution portion connected to a first gas... |
| 2017/0317187 |
Uniform Layers Formed with Aspect Ratio Trench Based Processes An embodiment includes a device comprising: first and second fins adjacent one another and each including channel and subfin layers, the channel layers having... |
| 2017/0317186 |
SOURCE/DRAIN RECESS VOLUME TRIM FOR IMPROVED DEVICE PERFORMANCE AND LAYOUT
DEPENDENCE Some embodiments of the present disclosure relates to a method of forming a semiconductor device having a strained channel and an associated device. In some... |
| 2017/0317185 |
GATE STRUCTURE HAVING DESIGNED PROFILE Semiconductor structures are provided. The semiconductor structure includes a substrate and a gate structure formed over the substrate. In addition, a sidewall... |
| 2017/0317184 |
Method of Forming a High Electron Mobility Transistor A high electron mobility transistor (HEMT) includes a first III-V compound layer and a second III-V compound layer disposed on the first III-V compound layer... |
| 2017/0317183 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF The characteristics of a semiconductor device are enhanced. In a semiconductor device (MISFET) having a gate electrode GE formed on a nitride semiconductor... |
| 2017/0317181 |
ONE-DIMENSIONAL NANOSTRUCTURE GROWTH ON GRAPHENE AND DEVICES THEREOF A method and structure for providing a GAA device. In some embodiments, a substrate including an insulating layer disposed thereon is provided. By way of... |
| 2017/0317180 |
Contact for High-K Metal Gate Device An integrated circuit having an improved gate contact and a method of making the circuit are provided. In an exemplary embodiment, the method includes... |
| 2017/0317179 |
GATE WITH SELF-ALIGNED LEDGE FOR ENHANCEMENT MODE GaN TRANSISTORS An enhancement-mode GaN transistor with reduced gate leakage current between a gate contact and a 2DEG region and a method for manufacturing the same. The... |
| 2017/0317178 |
METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE A method for manufacturing a semiconductor structure includes forming a first dielectric layer on a gate structure and a source drain structure. A recess is... |
| 2017/0317177 |
VERTICAL FIELD EFFECT TRANSISTORS WITH METALLIC SOURCE/DRAIN REGIONS Semiconductor devices having vertical FET (field effect transistor) devices with metallic source/drain regions are provided, as well as methods for fabricating... |
| 2017/0317176 |
Semiconductor Device Having a Channel Region Patterned into a Ridge by
Adjacent Gate Trenches A semiconductor device includes a transistor in a semiconductor body having a first main surface. The transistor includes: a source contact electrically... |
| 2017/0317175 |
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD Provided is a semiconductor device including a semiconductor substrate; a gate trench portion formed in a front surface of the semiconductor substrate; a dummy... |
| 2017/0317174 |
SILICON CARBIDE SUBSTRATE AND METHOD OF MANUFACTURING SILICON CARBIDE
SUBSTRATE A silicon carbide single-crystal substrate having a first main surface angled off relative to a {0001} plane, and a first peripheral edge provided continuously... |
| 2017/0317173 |
SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR SUBSTRATE, SILICON CARBIDE
SEMICONDUCTOR LAYER, FIRST ELECTRODE... A semiconductor device includes a semiconductor substrate of a first conductivity type, having a first principal surface and a second principal surface, a... |
| 2017/0317172 |
TWO-DIMENSIONAL CONDENSATION FOR UNIAXIALLY STRAINED SEMICONDUCTOR FINS Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based... |
| 2017/0317171 |
LEAKAGE-FREE IMPLANTATION-FREE ETSOI TRANSISTORS A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried... |
| 2017/0317170 |
SEMICONDUCTOR DEVICE HAVING GERMANIUM LAYER AS CHANNEL REGION AND METHOD
FOR MANUFACTURING THE SAME A semiconductor device having a channel region that is formed in a germanium layer and has a first conductive type, and a source region and a drain region that... |
| 2017/0317169 |
METHODS, APPARATUS, AND SYSTEM FOR IMPROVED NANOWIRE/NANOSHEET SPACERS A semiconductor structure, comprising a semiconductor substrate; at least one fin, wherein the at least one fin comprises one or more first layers and one or... |
| 2017/0317168 |
Bulk Nanosheet with Dielectric Isolation Techniques for dielectric isolation in bulk nanosheet devices are provided. In one aspect, a method of forming a nanosheet device structure with dielectric... |
| 2017/0317167 |
SEMICONDUCTOR INTEGRATED CIRCUITS (ICs) EMPLOYING LOCALIZED LOW DIELECTRIC
CONSTANT (LOW-K) MATERIAL IN... Semiconductor integrated circuits (ICs) employing localized low dielectric constant (low-K) material in inter-layer dielectric (ILD) material for improved... |
| 2017/0317166 |
ISOLATION STRUCTURES FOR CIRCUITS SHARING A SUBSTRATE Structures that include isolation structures and methods for fabricating isolation structures. First and second trenches are etched in a substrate and surround... |
| 2017/0317165 |
Semiconductor Device and Manufacturing Therefor An edge delimits a semiconductor body in a direction parallel to a first side of the semiconductor body. A peripheral area is arranged between the active area... |
| 2017/0317164 |
SEMICONDUCTOR DEVICE HAVING BARRIER LAYER TO PREVENT IMPURITY DIFFUSION A semiconductor device includes a semiconductor substrate having a first conductivity type region including a first conductivity type impurity. A first gate... |
| 2017/0317163 |
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE Hydrogen atoms and crystal defects are introduced into an n- semiconductor substrate by proton implantation. The crystal defects are generated in the n-... |
| 2017/0317162 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A semiconductor device includes a p-type semiconductor region in contact with a bottom face of a trench gate, wherein the p-type semiconductor region includes... |
| 2017/0317161 |
METHOD OF FORMING A CAPACITOR STRUCTURE AND CAPACITOR STRUCTURE The present disclosure provides a method of forming a capacitor structure and a capacitor structure. A semiconductor-on-insulator substrate is provided... |
| 2017/0317160 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING WITH A RESERVOIR CAPACITOR A semiconductor integrated circuit device may include a through silicon via (TSV), a keep out zone and a plurality of dummy patterns. The TSV may be arranged... |
| 2017/0317159 |
SEMICONDUCTOR DEVICE AND A DISPLAY DEVICE INCLUDING THE SAME A semiconductor device including a semiconductor layer, a first electrode, and a second electrode. The semiconductor layer includes a first source region, a... |
| 2017/0317158 |
DISPLAY DEVICE A display device according to an exemplary embodiment of the present invention includes: a scan line extending in a first direction; a data line crossing the... |
| 2017/0317157 |
DISPLAY PANEL AND ELECTRONIC DEVICE A display panel and an electronic device are provided. The display panel comprises a base substrate including a display region and a border region surrounding... |
| 2017/0317156 |
ORGANIC LIGHT EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE
SAME An organic light emitting display (OLED) device includes an organic light emitting diode having an anode and a cathode. The organic light emitting diode is... |
| 2017/0317155 |
BACKPLANE SUBSTRATE AND ORGANIC LIGHT EMITTING DIODE DISPLAY USING THE
SAME Disclosed are a backplane substrate which secures sufficient storage capacitance even when using small sub-pixels in a structure having very high resolution,... |
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