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Patent # Description
2017/0317002 POWER AMPLIFIER MODULE
A power amplifier module includes a substrate, a power amplifier having a first surface on which an electrode is defined and a second surface opposite the...
2017/0317001 Device Including a Semiconductor Chip Monolithically Integrated with a Driver Circuit in a Semiconductor Material
A device includes a driver circuit, a first semiconductor chip monolithically integrated with the driver circuit in a first semiconductor material, and a...
2017/0317000 ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREOF
An electronic component includes a substrate that has a first principal surface and a second principal surface, a chip that includes a mounting surface on...
2017/0316999 Electronic Sub-Module Including a Leadframe and a Semiconductor Chip Disposed on the Leadframe
An electronic sub-module includes a leadframe, a semiconductor chip disposed on the leadframe and an encapsulation material disposed on the leadframe and on...
2017/0316998 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
A manufacturing method of a semiconductor package includes locating a plurality of semiconductor packages on a substrate, forming a resin insulating layer...
2017/0316997 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a predetermined number of leads, a semiconductor element electrically connected to the leads and supported by one of the leads,...
2017/0316996 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
A semiconductor package includes a substrate having at least one recessed portion, a semiconductor device located on a surface of the substrate, the surface...
2017/0316994 Laminate package of chip on carrier and in cavity
A package which comprises a chip carrier made of a first material, a body made of a second material differing from the first material and being arranged on the...
2017/0316993 Power Semiconductor Device Module Having Mechanical Corner Press-Fit Anchors
A power semiconductor device module includes a metal baseplate and a plastic housing that together form a tray. Power electronics are disposed in the tray. A...
2017/0316992 Power Semiconductor Device Module Having Mechanical Corner Press-Fit Anchors
A power semiconductor device module includes a metal baseplate and a plastic housing that together form a tray. Power electronics are disposed in the tray. A...
2017/0316991 Semiconductor Devices and Methods for Testing a Gate Insulation of a Transistor Structure
A semiconductor device includes a first test structure including a first portion of a conductive structure and a second portion of the conductive structure...
2017/0316990 SEMICONDUCTOR DEVICE, SEMICONDUCTOR CHIP, AND TEST METHOD FOR SEMICONDUCTOR CHIP
A semiconductor device includes a signal processing circuit configured to generate an output signal, an output pad, an output line connecting the signal...
2017/0316989 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive pad...
2017/0316988 METHODS FOR DEPOSITING FILMS ON SENSITIVE SUBSTRATES
Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments,...
2017/0316987 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
A method includes followings operations. A substrate including a first surface and a second surface is provided. The substrate and a transparent film are...
2017/0316986 COMMONLY-BODIED FIELD-EFFECT TRANSISTORS
Structures for a commonly-bodied field-effect transistors and methods of forming such structures. The structure includes a body of semiconductor material...
2017/0316985 DUAL LINER CMOS INTEGRATION METHODS FOR FINFET DEVICES
An integrated circuit product includes an NFET FinFET device having a first fin that is made entirely of a first semiconductor material and a PFET FinFET...
2017/0316984 FINFET STRUCTURES AND METHODS OF FORMING THE SAME
An embodiment is a method including forming a first fin in a first region of a substrate and a second fin in a second region of the substrate, forming a first...
2017/0316983 Integrated Circuit Structure And Method Forming Trenches With Different Depths
A method includes depositing an ESL on a substrate; patterning the ESL such that a first region of the substrate is covered thereby and a second region of the...
2017/0316982 FIN FIELD EFFECT TRANSISTOR, SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A substrate having a first area and a second area is provided. The substrate is patterned to form trenches in the substrate and semiconductor fins between the...
2017/0316981 Semiconductor Device and Method of Manufacture
A semiconductor device and method of manufacture are provided in which a passivation layer is patterned. In embodiments, by-products from the patterning...
2017/0316980 FINFETS AND METHODS OF FORMING FINFETS
An embodiment is a method including forming a multi-layer stack over a substrate, the multi-layer stack including alternating first layers and second layers,...
2017/0316979 DISTINCT GATE STACKS FOR III-V-BASED CMOS CIRCUITS COMPRISING A CHANNEL CAP
Semiconductor devices and methods of forming the same include forming a first channel region on a first semiconductor region. A second channel region is formed...
2017/0316978 WAFER PROCESSING METHOD
A wafer is processed by transferring a wafer to a holding surface of a chuck table by using a suction pad. The front side of the wafer is held through a...
2017/0316977 WAFER PROCESSING METHOD
A wafer is transferred to a holding surface of a chuck table by using a transfer unit having a suction pad. The front side of the wafer is held under suction...
2017/0316976 METHOD OF PRODUCING AN OPENING WITH SMOOTH VERTICAL SIDEWALL IN A SEMICONDUCTOR SUBSTRATE
An opening (17) is etched from a main surface (10) of a substrate (1) of semiconductor material by deep reactive ion etching comprising a plurality of cycles,...
2017/0316975 STRUCTURE AND FORMATION METHOD OF DAMASCENE STRUCTURE
A semiconductor device is provided. The semiconductor device includes a semiconductor substrate and a first conductive feature over the semiconductor...
2017/0316974 CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL EXPANSION MATERIALS AND ASSOCIATED SYSTEMS,...
Semiconductor devices having interconnects incorporating negative expansion (NTE) materials are disclosed herein. In one embodiment a semiconductor device...
2017/0316973 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer...
2017/0316972 GLOBAL DIELECTRIC AND BARRIER LAYER
A semiconductor device including a substrate having a dielectric layer over the substrate and a first conductive feature disposed within the dielectric layer....
2017/0316971 3D IC METHOD AND DEVICE
A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated...
2017/0316970 ENHANCEMENT OF ISO-VIA RELIABILITY
A semiconductor structure and a process for forming a semiconductor structure. There is a back end of the line wiring layer which includes a wiring line, a cap...
2017/0316969 WAFER STACK AND FABRICATION METHOD THEREOF
A semiconductor device includes a first wafer and a second wafer. The first wafer has a top portion. The second wafer is disposed on the top portion of the...
2017/0316968 HIGH RESISTIVITY SEMICONDUCTOR-IN-INSULATOR WAFER AND A METHOD OF MANUFACTURING
A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an...
2017/0316967 APPARATUS AND METHODS FOR A MASK INVERTER
In some embodiments, apparatus and methods are provided for improved handling of lithography masks including a mask inverter that includes a first contact pad...
2017/0316966 METHODS AND APPARATUS FOR PROCESSING ITEMS WITH VERTICALLY ORIENTED PROCESSING TOOLS IN A CLEAN SPACE
The present invention provides various aspects of support for a fabrication facility capable of routine placement and replacement of processing tools in at...
2017/0316965 METHOD AND DEVICE FOR COATING A PRODUCT SUBSTRATE
A method and device for coating projecting surfaces of discrete projections of a product substrate that has functional units arranged at least partially in...
2017/0316964 DOME COOLING USING COMPLIANT MATERIAL
Embodiments described herein generally relate to apparatus for processing substrates. The apparatus generally include a process chamber including a lamp...
2017/0316963 DIRECT OPTICAL HEATING OF SUBSTRATES
A substrate support assembly includes a ceramic plate having an optical transmittance of at least 60% at a predetermined wavelength, the ceramic plate...
2017/0316962 SUBSTRATE STACK HOLDER, CONTAINER AND METHOD FOR PARTING A SUBSTRATE STACK
A substrate stack holder and a container comprising a multiplicity of such substrate stack holders as well as a method for parting a substrate stack.
2017/0316961 SUBSTRATE LIQUID PROCESSING METHOD, SUBSTRATE LIQUID PROCESSING APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM...
Disclosed is a substrate liquid processing method including: performing a liquid processing step of liquid-processing a substrate with a processing liquid, a...
2017/0316960 SUBSTRATE CLEANING APPARATUS AND SUBSTRATE CLEANING METHOD
A substrate cleaning apparatus (50) that cleans a substrate (S) includes: circumference supporting members (51) that support and rotate the substrate (S); a...
2017/0316959 SUBSTRATE CLEANING ROLL, SUBSTRATE CLEANING APPARATUS, AND SUBSTRATE CLEANING METHOD
A substrate cleaning roll that has a cylindrical shape and scrubs a surface of a substrate by rotating about a rotational axis in a longitudinal direction in...
2017/0316958 CHEMICAL SUPPLY UNIT AND APPARATUS FOR TREATING A SUBSTRATE
Provided is a substrate treating apparatus. The substrate treating apparatus comprises: a housing having a treating space therein; a spin head for supporting...
2017/0316957 STRUCTURE AND FORMATION METHOD OF CHIP PACKAGE WITH FAN-OUT STRUCTURE
Structures and formation methods of a chip package are provided. The method includes forming multiple conductive structures over a carrier substrate and...
2017/0316956 METHOD FOR ENCAPSULATING LARGE-AREA SEMICONDUCTOR ELEMENT-MOUNTED BASE MATERIAL
Provided is an encapsulation method not causing molding failures such as filling failures and flow marks when collectively encapsulating a large-area silicon...
2017/0316955 POWER MODULE PACKAGE HAVING PATTERNED INSULATION METAL SUBSTRATE
A power module package is provided, including a substrate, a first chip, and a second chip. The substrate includes a metal carrier, a patterned insulation...
2017/0316954 Stack Frame for Electrical Connections and the Method to Fabricate Thereof
A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts...
2017/0316953 METHOD FOR FABRICATING METALLIC OXIDE THIN FILM TRANSISTOR
A method for fabricating a metal oxide thin film transistor comprises selecting a substrate and fabricating a gate electrode thereon; growing a layer of...
2017/0316952 TRANSITION METAL-BEARING CAPPING FILM FOR GROUP III-NITRIDE DEVICES
An method of annealing by: providing a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; depositing a...
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