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Patent # Description
2017/0323872 OPTOELECTRONIC COMPONENT AND METHOD OF PRODUCING SAME
An optoelectronic component includes a composite body including a molded body; and an optoelectronic semiconductor chip embedded into the molded body, wherein...
2017/0323871 LIGHT-EMITTING DIODE DISPLAY APPARATUS
A light-emitting diode display apparatus including a circuit substrate, a display matrix, a driving circuit, and an interface circuit is provided. The display...
2017/0323870 LIGHT EMITTING DEVICE
A light-emitting device including a light-emitting unit, a packaging sealant, a transparent layer, and a reflective structure is provided. The light-emitting...
2017/0323869 Stacked Semiconductor Structure and Method
A method comprises depositing a first dielectric layer over a first chip comprising a plurality of first active circuits and a first connection pad, patterning...
2017/0323868 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of...
2017/0323867 Nanoscale Interconnect Array for Stacked Dies
A microelectronic assembly including an insulating layer having a plurality of nanoscale conductors disposed in a nanoscale pitch array therein and a pair of...
2017/0323866 SEMICONDUCTOR PACKAGE WITH MULTIPLE COPLANAR INTERPOSERS
A semiconductor package includes a first interposer, a second interposer, and a gap between the first interposer and the second interposer. The first...
2017/0323865 CHIP ARRANGEMENTS
A chip arrangement including a chip comprising a chip back side; a back side metallization on the chip back side, the back side metallization including a...
2017/0323864 BONDING WIRE FOR SEMICONDUCTOR DEVICE
There is provided a Cu bonding wire having a Pd coating layer on a surface thereof, that improves bonding reliability of a ball bonded part in a...
2017/0323863 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a...
2017/0323862 WAFER LEVEL FAN OUT SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A wafer level fan out semiconductor device and a manufacturing method thereof are provided. A first sealing part is formed on lateral surfaces of a...
2017/0323861 CIRCUIT BOARD WITH MEASURE AGAINST HIGH FREQUENCY NOISE
A circuit board with a measure against high frequency noise includes: an interconnect substrate having an interconnect pattern to which an IC which is a source...
2017/0323860 MICROELECTRONICS PACKAGE WITH INDUCTIVE ELEMENT AND MAGNETICALLY ENHANCED MOLD COMPOUND COMPONENT
The present disclosure relates to a microelectronics package with an inductive element and a magnetically enhanced mold compound component, and a process for...
2017/0323859 BACKSIDE FIB PROBING DETECTOR IN A FORWARD AND REVERSE BODY BIASING ARCHITECTURE
An integrated circuit including a plurality of first semiconductor strips of a first conductivity type and of second semiconductor strips of a second...
2017/0323858 Method of Manufacturing a Semiconductor Device Comprising a Support Element and Semiconductor Device Comprising...
A semiconductor device includes a power transistor in a semiconductor substrate portion, where the semiconductor substrate portion includes a central portion...
2017/0323857 ELECTRONIC CIRCUIT COMPONENT
An electronic circuit component includes: an electronic component; a leadframe that forms a circuit pattern corresponding to an arrangement of the electronic...
2017/0323856 METHOD FOR SUPPRESSING MATERIAL WARPAGE BY MEANS OF PRESSURE DIFFERENCE
A method for suppressing material warpage by means of a pressure difference comprises the following steps: a. preparing a plurality of carrier boards; b....
2017/0323855 LASER SCRIBE STRUCTURES FOR A WAFER
Structures that include an identification marking and fabrication methods for such structures. A chip is formed within a usable area of a wafer, and a marking...
2017/0323854 FEEDING OVERLAY DATA OF ONE LAYER TO NEXT LAYER FOR MANUFACTURING INTEGRATED CIRCUIT
A method of manufacturing an integrated circuit includes the following steps. A substrate including a plurality of exposure fields is provided, and each of the...
2017/0323853 INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME
An integrated fan-out package including an integrated circuit, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated...
2017/0323852 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate;...
2017/0323851 MULTILAYER INDUCTOR AND THE FABRICATION METHOD THEREOF
A multilayer electrical component is disclosed, wherein the multilayer electrical component comprises: a plurality of magnetic layers stacked over one another,...
2017/0323850 SEMICONDUCTOR DEVICES HAVING STAGGERED AIR GAPS
A semiconductor device includes a substrate, a plurality of first conductive patterns disposed on the substrate and a plurality of second conductive patterns...
2017/0323849 ADAPTER PANEL AND MANUFACTURING METHOD AND ENCAPSULATION STRUCTURE THEREOF AND BONDING METHOD FOR THE ADAPTER PANEL
Disclosed is an adapter panel and a method of manufacturing the same comprising a panel body having a first surface and an opposing second surface, wherein a...
2017/0323848 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
In an SOP1 having a semiconductor chip and another semiconductor chip, in wire coupling between the chips, a withstand voltage can be secured by setting an...
2017/0323847 DOUBLE-FACED COOLING-TYPE POWER MODULE
A double-facing cooling-type power module has coolers on both sides. The power module includes: a first switch having the coolers on both sides; a second...
2017/0323846 ELECTRONIC POWER DEVICE WITH FLAT ELECTRONIC INTERCONNECTION STRUCTURE
Electronic power device comprising: an active layer comprising several lateral and/or semi-lateral components for which the electrodes are located on a front...
2017/0323844 Strain-Tolerant Die Attach with Improved Thermal Conductivity, and Method of Fabrication
A mechanically-stable and thermally-conductive interface device between a semiconductor die and a package for the die, and related method of fabrication,...
2017/0323843 Gas-Cooled 3D IC with Wireless Interconnects
A three-dimensional integrated circuit includes two or more stacks of one or more active layers; a gas-cooling layer separating the two or more stacks and a...
2017/0323842 BONDED SUBSTRATE AND METHOD FOR MANUFACTURING BONDED SUBSTRATE
Provided is a bonded substrate mainly for mounting a power semiconductor in which the reliability to a thermal cycle has been enhanced as compared with a...
2017/0323841 ELECTRONIC DEVICE PROVIDED WITH AN INTEGRAL CONDUCTIVE WIRE AND METHOD OF MANUFACTURE
An electronic device includes a supporting substrate having a front mounting face and an electrical connection network. An integrated circuit chip is mounted...
2017/0323840 Package with Tilted Interface between Device Die and Encapsulating Material
A method includes forming a polymer layer covering a metal via in a wafer, grooving the wafer to form a trench, wherein the trench extends from a top surface...
2017/0323839 MOLDED PACKAGE
A molded package includes an IC chip mounted on a first surface of a lead frame, and a molded resin encapsulating the lead frame together with the IC chip. The...
2017/0323838 ELECTRONIC CIRCUIT MODULE
An electronic circuit module includes a circuit board, electronic components, an embedding layer, and a conductive film. The circuit board has a first...
2017/0323837 AIR CAVITY PACKAGE
An air cavity package includes a dielectric frame that is formed from an alumina ceramic, a polyimide, or a semi-crystalline thermoplastic. The dielectric...
2017/0323836 ELECTRONIC COMPONENT CONTAINING PACKAGE AND ELECTRONIC DEVICE
An electronic component containing package includes a substrate including a placement region for placing an electronic component in an upper face thereof; a...
2017/0323835 DIE EDGE CRACK AND DELAMINATION DETECTION
A die edge crack and delamination detection device includes a semiconductor device including an IC active area surrounded by at least one mechanical protection...
2017/0323834 SEMICONDUCTOR PACKAGE WITH ELECTRICAL TEST PADS
One or more embodiments are directed to semiconductor packages that include conductive test pads that are electrically coupled to, but distinct from, the leads...
2017/0323833 MINIMIZE MIDDLE-OF-LINE CONTACT LINE SHORTS
Semiconductor structures and methods of forming such structures are disclosed. In an embodiment, the semiconductor structure comprises a substrate, a...
2017/0323832 DUMMY MOL REMOVAL FOR PERFORMANCE ENHANCEMENT
The present disclosure relates to a method of forming an integrated chip having middle-of-the-line (MOL) structures arranged at an irregular pitch, and an...
2017/0323831 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating a semiconductor device includes forming first gate stacks on a first region of a substrate to be spaced apart by a first distance,...
2017/0323830 INTEGRATED CIRCUIT PACKAGE HAVING PIN UP INTERCONNECT
An integrated circuit package and manufacturing method thereof are described. The integrated circuit package includes pin up conductive plating to form an...
2017/0323829 INTEGRATED CIRCUIT PACKAGE HAVING I-SHAPED INTERCONNECT
An integrated circuit packaging is described and includes a plurality of electrical circuits developed using a first patterned conductive layer on a base,...
2017/0323828 MICROFEATURE WORKPIECES AND METHODS FOR FORMING INTERCONNECTS IN MICROFEATURE WORKPIECES
Methods for forming interconnects in microfeature workpieces, and microfeature workpieces having such interconnects are disclosed herein. The microfeature...
2017/0323827 Method for Forming Interconnect Structure
An apparatus includes a plurality of interconnect structures over a substrate, a dielectric layer formed over a top metal line of the plurality of interconnect...
2017/0323826 SINGLE LAYER INTEGRATED CIRCUIT PACKAGE
An integrated circuit packaging is described, including a plurality of electrical circuits developed using a first patterned conductive layer on a base,...
2017/0323825 ETCHING METHOD
A method includes performing one or more times of a sequence and reducing a film thickness of a fluorocarbon-containing film formed by performing one or more...
2017/0323824 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes: a substrate, a gate structure on the substrate, and a spacer adjacent to the gate structure, in which the spacer extends to a...
2017/0323823 METHOD AND APPARATUS FOR PROCESSING WAFER-SHAPED ARTICLES
In an apparatus for treating a wafer-shaped article, a spin chuck is configured to hold a wafer-shaped article of a predetermined diameter. A non-rotating...
2017/0323822 SYSTEMS, APPARATUS, AND METHODS FOR AN IMPROVED SUBSTRATE HANDLING ASSEMBLY
Embodiments of the present invention provide systems, apparatus, and methods for an improved substrate handling assembly. Embodiments include a pair of...
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