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Patent # Description
2017/0365576 BONDING WIRE FOR SEMICONDUCTOR DEVICE
The present invention provides a bonding wire capable of simultaneously satisfying ball bonding reliability and wedge bondability required of bonding wires for...
2017/0365575 Packaged IC With Solderable Sidewalls
A packaged IC wherein a portion of the sidewalls of the packaged IC are solderable metal. A method of forming a packaged IC wherein a portion of the sidewalls...
2017/0365574 MICROWAVE CONNECTORS FOR SEMICONDUCTOR WAFERS
Embodiments are directed to a coupler system including a semiconductor wafer, an interconnect layer formed over the semiconductor wafer and a connector that is...
2017/0365573 MANUFACTURING METHOD OF INTEGRATED CIRCUIT PACKAGE
A manufacturing method of an integrated circuit package including the following step is provided. A bottom redistribution layer according to IC design rule is...
2017/0365572 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes a first connection member having a through hole, a semiconductor chip in the through hole, having an active surface...
2017/0365571 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
A semiconductor device having an electrode type of the ball grid array (BGA) and a process of forming the electrode are disclosed. The electrode insulating...
2017/0365570 DEVICE COMPRISING A SUBSTRATE THAT INCLUDES AN IRRADIATED PORTION ON A SURFACE OF THE SUBSTRATE
Some implementations provide a device that includes a passive component and a substrate coupled to the passive component, where a surface of the substrate...
2017/0365569 Contact Bumps and Methods of Making Contact Bumps on Flexible Electronic Devices
Contact bumps between a contact pad and a substrate can include a rough surface that can mate with the material of the substrate of which may be flexible. The...
2017/0365568 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an...
2017/0365567 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an...
2017/0365566 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an...
2017/0365565 HIGH DENSITY REDISTRIBUTION LAYER (RDL) INTERCONNECT BRIDGE USING A RECONSTITUTED WAFER
An integrated circuit (IC) package is disclosed that contains high density interconnects to connect multiple dies. The IC package includes an encapsulated...
2017/0365564 Semiconductor Device and Method
A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element...
2017/0365563 Multiband QAM Interface for Slab Waveguide
Systems and methods are provided for an integrated chip. An integrated chip includes a package substrate including a plurality of first layers and a plurality...
2017/0365562 PATTERNING GRAPHENE WITH A HARD MASK COATING
Embodiments of the disclosed technology include patterning a graphene sheet for biosensor and electronic applications using lithographic patterning techniques....
2017/0365561 METHOD FOR PREVENTING BOTTOM LAYER WRINKLING IN A SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device includes forming a first insulating film over a semiconductor substrate and forming a second insulating film...
2017/0365560 PATTERNED SHIELD STRUCTURE
A patterned shield structure applied to an integrated circuit (IC) is disposed between an inductor and a substrate of the integrated circuit. The patterned...
2017/0365559 ELECTRONIC PART EMBEDDED SUBSTRATE AND METHOD OF PRODUCING AN ELECTRONIC PART EMBEDDED SUBSTRATE
An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part,...
2017/0365557 SELF-SIMILAR AND FRACTAL DESIGN FOR STRETCHABLE ELECTRONICS
The present invention provides electronic circuits, devices and device components including one or more stretchable components, such as stretchable electrical...
2017/0365556 ELECTRONIC CIRCUIT APPARATUS
There is provided an electronic circuit apparatus in which the heat generated at an electronic component can be transferred to a heat spreader efficiently. An...
2017/0365555 Semiconductor Devices and Methods of Manufacturing the Same
Semiconductor devices may include a structure on a substrate, an insulating interlayer, a metal silicide pattern, a first barrier pattern, a second barrier...
2017/0365554 POLYMER BONDING WITH IMPROVED STEP COVERAGE
A system and method for packaging an electronic device are provided. The packaged electronic device may include a structure material having one portion with a...
2017/0365553 SEMICONDUCTOR DEVICE
A plurality of first wiring layers are arranged on a main surface of a substrate, a first insulating film is arranged on upper faces of the plurality of first...
2017/0365552 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
A semiconductor device includes a dummy fin structure disposed over a substrate, a dummy gate structure disposed over a part of the dummy fin structure, a...
2017/0365551 METHOD OF PRODUCING A SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA COVERED BY A SOLDER BALL
A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied...
2017/0365550 COPPER INTERCONNECT STRUCTURES
Semiconductor devices include a patterned dielectric layer overlaying a semiconductor substrate; a metal layer comprising copper disposed in the patterned...
2017/0365549 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The manufacturing method of a semiconductor device can improve the mechanical strength of a pad more than before, and suppress the occurrence of a crack. The...
2017/0365548 Optimizing Layout of Irregular Structures in Regular Layout Context
A plurality of regular wires are formed within a given chip level, each having a linear-shape with a length extending in a first direction and a width...
2017/0365547 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD, AND CONDUCTIVE POST
A semiconductor device comprises a semiconductor element 12 including electrodes 12G, 12S on a front surface and conductive posts 14, 14', 14'' including one...
2017/0365546 METHOD AND STRUCTURES FOR HEAT DISSIPATING INTERPOSERS
An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive...
2017/0365545 RESIN BOARD, METHOD OF MANUFACTURING RESIN BOARD, CIRCUIT BOARD, AND METHOD OF MANUFACTURING CIRCUIT BOARD
A resin board includes: a resin layer and a through electrode buried in the resin layer, wherein the through electrode has an electrode surface exposed from a...
2017/0365544 SEMICONDUCTOR DEVICE FABRICATED BY FLUX-FREE SOLDERING
A method of fabricating a semiconductor device is disclosed. In one aspect, the method includes placing a first semiconductor chip on a carrier with the first...
2017/0365543 SEMICONDUCTOR DEVICE PACKAGE
A semiconductor device package includes a first conductive base, a first insulation layer and a second insulation layer. The first conductive base has a first...
2017/0365542 SEMICONDUCTOR DEVICE PACKAGE
A semiconductor device package includes a first conductive base, a first semiconductor die, a dielectric layer, a first patterned conductive layer, and a...
2017/0365541 POWER MODULE
A power module (10) having a leadframe (20), a power semiconductor (30) arranged on the leadframe (20), a base plate (40) for dispersing heat generated by the...
2017/0365540 PACKAGE STRUCTURE
A chip packaging structure includes a flexible circuit board, a first built-up structure, a second built-up structure, and a first solder resist layer. The...
2017/0365539 Semiconductor Packages and Methods of Fabrication Thereof
In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor chip having a first side and an opposite second...
2017/0365538 Flexible Graphite Sheet Support Structure and Thermal Management Arrangement
A flexible graphite sheet support structure forms a thermal management arrangement for device having a heat source. The flexible graphite sheet support...
2017/0365537 THIN FILM BASED FAN OUT AND MULTI DIE PACKAGE PLATFORM
Thin film based fan out wafer level packaging and a method of manufacturing the same are disclosed. Embodiments include a method including forming tapered via...
2017/0365536 Electronic Device
An electronic device includes electronic components and an epoxy resin portion which seals the electronic components. The electronic device is disposed in a...
2017/0365535 High Voltage Power Electronics Module For Subsea Applications
The present disclosure relates to a high voltage power electronics module for subsea applications. The power electronics module includes: a baseplate, a power...
2017/0365534 MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
A manufacturing method of a semiconductor package includes etching a first surface and a side surface of a base substrate, the base substrate including the...
2017/0365533 COMPACT HIGH-VOLTAGE SEMICONDUCTOR PACKAGE
There are disclosed herein various implementations of a compact high-voltage semiconductor package. In one exemplary implementation, such a semiconductor...
2017/0365532 INDUCTIVE MONITORING OF CONDUCTIVE TRENCH DEPTH
In fabrication of an integrated circuit having a layer with a plurality of conductive interconnects, a layer of a substrate is polished to provide the layer of...
2017/0365531 WAFER PROCESSING EQUIPMENT HAVING CAPACITIVE MICRO SENSORS
Embodiments include devices and methods for detecting particles, monitoring etch or deposition rates, or controlling an operation of a wafer fabrication...
2017/0365530 METHOD OF PRODUCING A FUNCTIONAL INLAY AND INLA PRODUCED BY THE METHOD
The method of manufacturing a functional inlay, comprises at least the steps of: (1) providing a substrate (7) with a wire antenna embedded therein and with an...
2017/0365529 LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE INTEGRATED WITH VERTICAL FIELD EFFECT TRANSISTOR
An electrical device that in some embodiments includes a substrate including a lateral device region and a vertical device region. A lateral diffusion metal...
2017/0365528 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes a transistor configuration including first and second gate electrodes, each of the first and second gate electrodes having at...
2017/0365527 TRANSISTOR, SEMICONDUCTOR STRUCTURE, AND FABRICATION METHOD THEREOF
A method for forming a transistor is provided. The method includes providing a semiconductor substrate, and forming a dielectric layer on the semiconductor...
2017/0365526 VERTICAL FIN FIELD EFFECT TRANSISTOR (V-FINFET), SEMICONDUCTOR DEVICE HAVING V-FINFET AND METHOD OF FABRICATING...
A vertical fin field effect transistor (V-FinFET) is provided as follows. A substrate has a lower source/drain (S/D). A fin structure extends vertically from...
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