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Patent # Description
2018/0019290 ORGANIC EL DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME
The purpose is to provide an organic EL display device which has good sensitivity and is free from the occurrence of luminance decrease or pixel shrinkage,...
2018/0019288 DISPLAY PANEL AND DISPLAY DEVICE
Disclosed are a display panel and a display device, the display panel includes: an array substrate, which includes a base substrate and a display drive circuit...
2018/0019287 ORGANIC LIGHT EMITTING DEVICE (OLED) PIXEL ARRANGEMENT STRUCTURE
An organic light emitting diode pixel arrangement structure includes multiple first sub-pixels, multiple second sub-pixels, and multiple third sub-pixels. Two...
2018/0019286 ORGANIC ELECTROLUMINESCENCE DISPLAY DEVICE
An organic electroluminescence display device includes a first electrode, a first light emitter on the first electrode, the first light emitter including a...
2018/0019285 LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE
A light-emitting device includes a first light-emitting element emitting blue light, a second light-emitting element emitting green light, and a third...
2018/0019284 METHOD OF OPTIMIZING AN INTERFACE FOR PROCESSING OF AN ORGANIC SEMICONDUCTOR
A method of forming an organic semiconductor includes forming a thin film transistor ("TFT") backplane; forming a pixel well over the TFT backplane using a...
2018/0019283 TANDEM ORGANIC-INORGANIC PHOTOVOLTAIC DEVICES
A tandem photovoltaic cell includes a substrate, a first electrode formed on the substrate, and a first sub-cell comprising a first light absorption material...
2018/0019282 CARBON NANOTUBE TRANSISTOR AND LOGIC WITH END-BONDED METAL CONTACTS
A method for manufacturing a semiconductor device includes forming a dielectric layer on a substrate, forming a first carbon nanotube (CNT) layer on the...
2018/0019281 VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF FABRICATING THE SAME
A variable resistance memory device may include separate memory cells between separate vertical intersections of first conductive lines extending in a first...
2018/0019280 METHODS OF MANUFACTURING IMAGE SENSORS
In a method of manufacturing an image sensor, photodiodes may be formed on a semiconductor layer in an active pixel region and a peripheral region. A structure...
2018/0019279 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC APPARATUS
A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by...
2018/0019278 VISIBLE AND INFRARED IMAGE SENSOR
A method of image sensor fabrication includes forming a second semiconductor layer on a back side of a first semiconductor layer. The method also includes...
2018/0019277 IMAGE PICKUP UNIT AND METHOD OF MANUFACTURING THE SAME
An image pickup device and a method of the same are described herein. By way of first example, the image pickup device includes a seal member having a first...
2018/0019276 SOLID-STATE IMAGING DEVICE AND MANUFACTURING METHOD OF THE SAME, AND ELECTRONIC APPARATUS
The present disclosure relates to a solid-state imaging device and a manufacturing method of the same, and an electronic apparatus, capable of more reliably...
2018/0019275 CHIP SCALE PACKAGE AND RELATED METHODS
Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an...
2018/0019274 SENSOR PACKAGE STRUCTURE
A sensor package structure includes a substrate, a sensing member, a shielding member, a metallic wire, and an encapsulating compound. The substrate includes a...
2018/0019273 ENERGY HARVESTING CONFIGURABLE IMAGE SENSOR
An image sensor is provided, comprising a plurality of photo-diode pixels arranged in a two-dimensional array, an energy harvesting output bus connected to the...
2018/0019272 IMAGE LAG FREE PIXEL
A CMOS image sensor pixel (200) comprising a photo-sensitive element (101) for generating a charge in response to incident light; a plurality of charge storage...
2018/0019271 SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC EQUIPMENT
A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of...
2018/0019270 SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
A solid-state imaging device includes pixels each having a photoelectric conversion element for converting incident light to an electric signal, color filters...
2018/0019269 DUAL BAND PHOTODETECTOR AND A METHOD THEREOF
Photodetectors and methods for dual band photo detection are disclosed. The photodetector includes a stack of semiconductor layers defining first and second...
2018/0019268 STACKED-CHIP BACKSIDE-ILLUMINATED SPAD SENSOR WITH HIGH FILL-FACTOR
A photon detection device includes a single photon avalanche diode (SPAD) disposed in a semiconductor layer. A guard ring structure is disposed in the...
2018/0019267 DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method for producing a display device includes locating a substrate, including a plurality of pixels, on a jig including a magnet; locating a plate formed of...
2018/0019266 SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF
In a display device such as a liquid crystal display device, a large-sized display screen is realized under low power consumption. A surface of a source wiring...
2018/0019265 DISPLAY PANEL, FABRICATION METHOD THEREOF AND DISPLAY APPARATUS
A display panel, a fabrication method thereof and a display apparatus are provided. The display panel includes: a nanometer light splitting film arranged...
2018/0019264 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
A display substrate includes abase substrate with a display area and a light-blocking area around the display area, a switching element disposed on the base...
2018/0019263 ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE, AND DISPLAY DEVICE
The embodiments of present disclosure disclose an array substrate, a method for manufacturing the array substrate, and a display device. The method includes...
2018/0019262 DISPLAY DRIVER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor...
2018/0019261 VOLTAGE DISTRIBUTION IN TRANSISTOR STACKS USING NON-UNIFORM TRANSISTOR DIMENSIONS
A radio-frequency switch includes a first field-effect transistor having drain and source fingers separated by a first drain-to-source distance and a second...
2018/0019260 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
On a semiconductor substrate having an SOI region and a bulk silicon region formed on its upper surface, epitaxial layers are formed in source and drain...
2018/0019259 SEMICONDUCTOR DEVICE AND METHOD FOR MONOLITHICALLY INTEGRATED POWER DEVICE AND CONTROL LOGIC
A monolithic semiconductor device has a substrate with a power region and control region. The substrate can be a silicon-on-insulator substrate. An opening is...
2018/0019258 NONVOLATILE MEMORY DEVICES AND METHODS FORMING THE SAME
Provided are nonvolatile memory devices and methods of forming the same. The nonvolatile memory device includes a plurality of word lines, a ground select...
2018/0019257 MEMORY DEVICE
A memory device includes a gate structure including a plurality of gate electrode layers stacked on an upper surface of a substrate, a plurality of vertical...
2018/0019256 SELECTIVE TUNGSTEN GROWTH FOR WORD LINES OF A THREE-DIMENSIONAL MEMORY DEVICE
Void formation in tungsten lines in a three-dimensional memory device can be prevented by providing polycrystalline aluminum oxide liners in portions of...
2018/0019255 Elevationally-Extending String Of Memory Cells Individually Comprising A Programmable Charge Storage Transistor...
An elevationally-extending string of memory cells comprises an upper stack elevationally over a lower stack. The upper and lower stacks individually comprise...
2018/0019254 THREE-DIMENSIONAL NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF
A three-dimensional non-volatile memory including a substrate, a stacked structure and a channel layer. The stacked structure is disposed on the substrate and...
2018/0019253 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor memory device includes a stacked body, first memory portions, and second memory portions. The stacked body...
2018/0019252 NONVOLATILE MEMORY AND FABRICATION METHOD THEREOF
A nonvolatile memory cell includes a semiconductor substrate, a first OD region, a second OD region for forming an erase gate region, and a trench isolation...
2018/0019251 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a non-volatile memory and a logic circuit. The non-volatile memory includes a stacked structure comprising a first insulating...
2018/0019250 UV-ERASABLE MEMORY DEVICE WITH UV TRANSMITTING WINDOW AND FABRICATION METHOD THEREOF
A UV-erasable memory device with a UV transmitting window is disclosed. The UV-erasable memory device includes a substrate, two serially connected PMOS...
2018/0019249 INTEGRATED CIRCUITS WITH PROGRAMMABLE MEMORY AND METHODS FOR PRODUCING THE SAME
Methods of producing integrated circuits and integrated circuits produced by those methods are provided. In an exemplary embodiment, a method of producing an...
2018/0019248 SEMICONDUCTOR MEMORY DEVICE
In a semiconductor memory device, voltage application from a memory gate electrode of the memory capacitor to a word line can be blocked by a rectifier element...
2018/0019247 MEMORY CELL AND MEMORY APPARATUS
A memory cell of the present disclosure includes: anti-fuses that are respectively inserted into a plurality of paths, one ends of the respective plurality of...
2018/0019246 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES HAVING CONTACT PLUGS OVERLAPPING ASSOCIATED BITLINE STRUCTURES...
A semiconductor device can include a plurality of landing pads arranged according to a layout on a substrate, wherein a cross-sectional shape of each of the...
2018/0019245 Methods Of Forming An Elevationally Extending Conductor Laterally Between A Pair Of Conductive Lines
A method of forming an elevationally extending conductor laterally between a pair of conductive lines comprises forming a pair of conductive lines spaced from...
2018/0019244 SEMICONDUCTOR DEVICES
A semiconductor device includes a substrate, a bit line structure on the substrate, a first contact structure on a sidewall of the bit line structure, a second...
2018/0019243 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device may include: a substrate having a cell area defined thereon, the cell area including a cell block area and an edge area; a...
2018/0019242 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device manufacturing method includes forming fins in first and second regions defined on a substrate. The fins include first fin, second fin,...
2018/0019241 METHOD, APPARATUS, AND SYSTEM HAVING SUPER STEEP RETROGRADE WELL WITH ENGINEERED DOPANT PROFILES
Generally, in one embodiment, the present disclosure is directed to a method for forming a transistor. The method includes: implanting a substrate to form at...
2018/0019240 FIN-TYPE FIELD EFFECT TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A fin-type field effect transistor comprising a substrate, at least one gate structure, spacers and source and drain regions is described. The substrate has a...
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