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Patent # Description
2018/0019239 INTEGRATED PHOTO DETECTOR, METHOD OF MAKING THE SAME
An integrated photo detector with enhanced electrostatic discharge damage (ESD) protection. The integrated photo detector includes a first photodiode formed in...
2018/0019238 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
A display device includes: a display substrate; an opposing substrate opposing the display substrate; and a light amount control layer disposed between the...
2018/0019237 ELECTRONIC DEVICE
In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an...
2018/0019236 Method and Structure of Three-Dimensional Chip Stacking
A method includes placing a first plurality of device dies over a first carrier, with the first plurality of device dies and the first carrier in combination...
2018/0019235 METHOD AND DEVICE OF POP STACKING FOR PREVENTING BRIDGING OF INTERPOSER SOLDER BALLS
A first semiconductor package of a POP structure has a first body and a plurality of first solder balls. A second semiconductor package of the POP structure...
2018/0019234 DISPLAY DEVICES AND METHODS FOR FORMING THE SAME
A display device is provided. The display device includes a first conductive pad disposed on a substrate, wherein the first conductive pad has a contact area...
2018/0019233 MICRO-LED ARRAY DISPLAY DEVICES
Micro-LED array display devices are disclosed. One of the micro-LED display devices includes: a micro-LED panel including a plurality of micro-LED pixels; a...
2018/0019232 LIGHT EMITTING COMPONENT
A light emitting component includes an epitaxial structure, an adhesive layer, a first reflective layer, a second reflective layer, a block layer, a first...
2018/0019231 LIGHT EMITTING ELEMENT AND LIGHT EMITTING ELEMENT ARRAY
A light emitting element includes a semiconductor including an active layer, and a planar shape of the light emitting elements including a concave polygon. The...
2018/0019230 Semiconductor Device and Method of Manufacture
A semiconductor device and method that utilize a surface device are provided. In an embodiment a fuse line comprises an underbump metallization which has two...
2018/0019229 INTEGRATED CIRCUIT PACKAGE ASSEMBLY
An integrated circuit package assembly includes a first integrated circuit package and a second integrated circuit package. The first integrated circuit...
2018/0019228 FAN OUT SEMICONDUCTOR DEVICE INCLUDING A PLURALITY OF SEMICONDUCTOR DIE
A semiconductor package is disclosed including a number of stacked semiconductor die, electrically connected to each other with wire bonds. The stacked...
2018/0019227 THROUGH SILICON VIA SHARING IN A 3D INTEGRATED CIRCUIT
The present disclosure generally relates to semiconductor structures and, more particularly, to intelligent through silicon via sharing in 3D-IC integrated...
2018/0019226 BONDING SYSTEM
A bonding system includes a substrate transfer device configured to transfer a first substrate and a second substrate to a bonding apparatus, a first holding...
2018/0019225 Bonding System
A bonding system includes a substrate transfer device configured to transfer a first substrate and a second substrate in a normal pressure atmosphere, a...
2018/0019224 WEDGE BONDING COMPONENT
There is provided with a surface for contacting a wire. At least a part of the surface comprises a surface of a ceramic sintered body containing aluminum oxide...
2018/0019223 MOUNTING DEVICE AND MOUNTING METHOD
A mounting device includes a thermocompression bonding head, a pressure reduction mechanism, and a resin sheet feed mechanism. The thermocompression bonding...
2018/0019222 FLEXIBLE CIRCUIT LEADS IN PACKAGING FOR RADIO FREQUENCY DEVICES AND METHODS THEREOF
A packaged RF device is provided that utilizes flexible circuit leads. The RF device includes at least one integrated circuit (IC) die configured to implement...
2018/0019221 SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor package device includes a first die, an adhesive layer, and an encapsulant layer. The first die comprises a first electrode at a first surface...
2018/0019220 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
A display device includes: a flexible substrate having a display area for displaying an image and a peripheral area outside the display area; a first pad...
2018/0019219 SURFACE FINISHES FOR INTERCONNECTION PADS IN MICROELECTRONIC STRUCTURES
A surface finish may be formed in a microelectronic structure, wherein the surface finish may include a multilayer interlayer structure. Thus, needed...
2018/0019218 METHOD FOR PROCESSING AN ELECTRONIC COMPONENT AND AN ELECTRONIC COMPONENT
According to various embodiments an electronic component includes: at least one electrically conductive contact region; a contact pad including a...
2018/0019217 Calibration Kits for RF Passive Devices
A method includes measuring a first calibration kit in a wafer to obtain a first performance data. The wafer includes a substrate, and a plurality of...
2018/0019216 ANTENNA ON INTEGRATED CIRCUIT PACKAGE
An antenna on integrated circuit (IC) package is disclosed. In an embodiment, an IC package comprises: a substrate; a radio frequency (RF) transceiver attached...
2018/0019215 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes the steps of preparing a semiconductor layer including a wide bandgap semiconductor, the...
2018/0019214 WAFER RIGIDITY WITH REINFORCEMENT STRUCTURE
Reinforcement structures used with a thinned wafer and methods of manufacture are provided. The method includes forming trenches or vias at least partially...
2018/0019213 STRETCHABLE ELECTRONICS FABRICATION METHOD WITH STRAIN REDISTRIBUTION LAYER
Embodiments of the invention include a microelectronic device and methods for forming a microelectronic device. In an embodiment, the microelectronic device...
2018/0019212 SYSTEMS AND METHODS FOR PROVIDING ELECTROMAGNETIC INTERFERENCE SHIELDING FOR INTEGRATED CIRCUIT MODULES
An automated system for maintaining paint thickness uniformity over the surface of a cap encapsulating at least one integrated circuit (IC) module on a panel...
2018/0019211 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
A semiconductor package includes a substrate including at least one mounted electronic device; a sealer disposed to seal the electronic device; and a...
2018/0019210 INTEGRATED CIRCUIT APPARATUS
An integrated circuit apparatus includes a substrate, an IC chip disposed above the substrate, and an electromagnetic shielding layer disposed on a surface of...
2018/0019209 SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor device structure is provided. The semiconductor device structure includes a first device. The semiconductor device structure includes a...
2018/0019208 Prototyping of Electronic Circuits with Edge Interconnects
In a method of forming an assembly including projecting or protruding nodules, a substrate is provided that supports an electrical circuit. One or more...
2018/0019207 DUAL POWER STRUCTURE WITH CONNECTION PINS
In some embodiments, the present disclosure relates to an integrated chip having a lower power rail continuously extending over a plurality of gate structures....
2018/0019206 ELECTRIC FUSE STRUCTURE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device is disclosed. First, a substrate is provided, and first fuse branches and second fuse branches are formed in the...
2018/0019205 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device is disclosed. First, a substrate is provided, and a first dielectric layer is formed on the substrate, in which a...
2018/0019204 Semiconductor Devices and Methods for Forming a Semiconductor Device
A semiconductor device includes a crack propagation prevention structure. The crack propagation prevention structure is located at an edge region of a wiring...
2018/0019203 MULTI-LEVEL AIR GAP FORMATION IN DUAL-DAMASCENE STRUCTURE
An upper layer is formed in a first interlayer dielectric (ILD) layer. The upper layer comprises a plurality of metal interconnects and one or more upper layer...
2018/0019202 MULTI-LEVEL AIR GAP FORMATION IN DUAL-DAMASCENE STRUCTURE
An upper layer is formed in a first interlayer dielectric (ILD) layer. The upper layer comprises a plurality of metal interconnects and one or more upper layer...
2018/0019201 SWITCHED POWER STAGE WITH INTEGRATED PASSIVE COMPONENTS
A scalable switching regulator architecture has an integrated inductor. In some embodiments an area and current drive capability of switches of the switching...
2018/0019200 MULTI-LEVEL AIR GAP FORMATION IN DUAL-DAMASCENE STRUCTURE
An upper layer is formed in a first interlayer dielectric (ILD) layer. The upper layer comprises a plurality of metal interconnects and one or more upper layer...
2018/0019199 SEMICONDUCTOR DEVICE HAVING REDISTRIBUTION LAYER WITH COPPER MIGRATION STOPPING
A semiconductor device having a first dielectric layer and a redistribution layer. The redistribution layer has sidewalls and is formed on a passivation layer...
2018/0019198 INTERPOSER, MODULE, AND METHOD OF PRODUCING INTERPOSER
To achieve an interposer being capable of corresponding to a variety of pitch conversions and being inexpensive as compared to the one in the related art. An...
2018/0019197 PACKAGE WITH PASSIVATED INTERCONNECTS
Semiconductor packages with interconnects having passivation thereon is disclosed. The passivation layer may be any suitable dielectric material that may...
2018/0019196 WIRING SUBSTRATE AND SEMICONDUCTOR PACKAGE
A wiring substrate includes an insulating layer and a wiring layer buried in the insulating layer at a first surface of the insulating layer. The wiring layer...
2018/0019195 Semiconductor Device and Method of Using Partial Wafer Singulation for Improved Wafer Level Embedded System In...
A semiconductor device includes a semiconductor wafer including a plurality of first semiconductor die. An opening is formed partially through the...
2018/0019194 Low Parasitic Surface Mount Circuit Over Wirebond IC
A semiconductor device has an interposer and a surface mount technology (SMT) component disposed on the interposer. The interposer is disposed on an active...
2018/0019193 BALL GRID ARRAY (BGA) WITH ANCHORING PINS
Embodiments herein may relate to an electronic device that includes a board. The electronic device may include a device physically coupled with the board by an...
2018/0019192 SEMICONDUCTOR PACKAGE
A semiconductor package includes a substrate, a conductive layer, a first surface mount device (SMD) and a bonding wire. The substrate has a t top surface. The...
2018/0019191 CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHODS OF MANUFACTURE
A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by...
2018/0019190 POWER SEMICONDUCTOR DEVICE
The invention relates to a power semiconductor device with a substrate and an electrically conductive DC voltage bus bar system and a capacitor connected to...
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