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Patent # Description
2018/0026152 Displays With Camera Window Openings
A display may include a color filter layer, a liquid crystal layer, and a thin-film transistor layer. A camera window may be formed in the display to...
2018/0026151 TEXTURING RIBBONS FOR PHOTOVOLTAIC MODULE PRODUCTION
A method for texturing a photovoltaic module ribbon on a photovoltaic cell including a plurality of first electrodes on a first side and a plurality of second...
2018/0026150 WAVELENGTH CONVERSION MEMBER AND PHOTOVOLTAIC DEVICE USING SAME
A wavelength conversion member (20) includes a fluoride phosphor (25) activated by Ce.sup.3+ or Eu.sup.2+. Then, with regard to the fluoride phosphor, internal...
2018/0026149 SOLAR ANTENNA ARRAY FABRICATION
A solar antenna array may comprise an array of carbon nanotube antennas that may capture and convert sunlight into electrical power. A method for constructing...
2018/0026148 PHOTOVOLTAIC SOLAR CELL WITH BACKSIDE RESONANT WAVEGUIDE
A solar cell has a backside resonant waveguide structure. The backside structure includes a plurality of resonant waveguides formed in or on a ...
2018/0026147 VERTICAL GATE GUARD RING FOR SINGLE PHOTON AVALANCHE DIODE PITCH MINIMIZATION
A photon detection device includes a single photon avalanche diode (SPAD) including a multiplication junction defined at an interface between n doped and p...
2018/0026146 THIN FILM PLASMONIC SOLAR CELL
A plasmonic scattering nanomaterial comprising a substrate layer, a metal oxide layer in continuous contact with the substrate layer and silver nanoparticles...
2018/0026145 LIGHT DETECTION DEVICE
A semiconductor substrate includes a first region in which a plurality of pixels are disposed and a second region located inside the first region to be...
2018/0026144 POWER SEMICONDUCTOR DEVICES INCORPORATING SINGLE CRYSTALLINE ALUMINUM NITRIDE SUBSTRATE
The invention provides a power semiconductor device including an aluminum nitride single crystalline substrate, wherein the dislocation density of the...
2018/0026143 SUPER-JUNCTION SCHOTTKY DIODE
The present invention relates to the field of semiconductor technology, particularly to a super-junction schottky diode. According to the present invention,...
2018/0026142 SEMICONDUCTOR DEVICE
An object is to achieve low power consumption and a long lifetime of a semiconductor device having a wireless communication function. The object can be...
2018/0026141 THIN-FILM TRANSISTOR, METHOD FOR PRODUCING THIN-FILM TRANSISTOR AND IMAGE DISPLAY APPARATUS USING THIN-FILM...
A thin-film transistor including an insulative substrate, a gate electrode formed on the insulative substrate, a gate insulating layer formed on the substrate...
2018/0026140 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including...
2018/0026139 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor...
2018/0026138 TFT circuit board and display device having the same
The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board...
2018/0026137 FIN-TYPE FIELD-EFFECT TRANSISTORS WITH STRAINED CHANNELS
Device structures for a fin-type field-effect transistor (FinFET) and methods for fabricating a device structure for a FinFET. A fin comprised of a...
2018/0026136 SEMICONDUCTOR DEVICE WITH FIN AND RELATED METHODS
A semiconductor device may include a substrate, a fin above the substrate and having a channel region therein, and source and drain regions adjacent the...
2018/0026135 VERTICAL SCHOTTKY CONTACT FET
A semiconductor structure containing a vertical Schottky contact transistor is provided in which the contact resistance as well as the junction resistance is...
2018/0026134 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
In an LDMOS having an element isolation region of an STI structure, there is prevented an occurrence of insulation breakdown which might be caused when...
2018/0026133 Semiconductor Device Including a Transistor Array and a Termination Region and Method of Manufacturing Such a...
A semiconductor device in a semiconductor substrate having a first main surface includes a transistor array and a termination region. The transistor array...
2018/0026132 METHODS OF REDUCING THE ELECTRICAL AND THERMAL RESISTANCE OF SiC SUBSTRATES AND DEVICES MADE THEREBY
A power semiconductor device includes a silicon carbide substrate and at least a first layer or region formed above the substrate. The silicon carbide...
2018/0026131 SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR
To suppress current leakage in a semiconductor device having a gate insulating film and a gate electrode. A gate electrode is continuously formed in a film via...
2018/0026130 Method of Manufacturing a Semiconductor Device with a Metal-Filled Groove in a Polysilicon Gate Electrode
A method of manufacturing a semiconductor device includes: forming a trench extending into a semiconductor substrate and a polysilicon gate electrode in the...
2018/0026129 Trench Edge Termination Structure for Power Semiconductor Devices
Edge termination structures for power semiconductor devices (or power devices) are disclosed. The purpose of this invention is to reduce the difficulty of deep...
2018/0026128 HIGH ACCEPTOR LEVEL DOPING IN SILICON GERMANIUM
A semiconductor structure is provided in which gallium-doped sacrificial epitaxial or polycrystalline germanium layer is formed on a silicon germanium...
2018/0026127 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device has an active region in which a plurality of unit cells are regularly arranged, each of the unit cells including: a channel region...
2018/0026126 Heterostructure Power Transistor with AlSiN Passivation Layer
A heterostructure semiconductor device includes a first active layer and a second active layer disposed on the first active layer. A two-dimensional electron...
2018/0026125 SEMICONDUCTOR DEVICE
A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a source pad, a drain pad, and a source external...
2018/0026124 SEMICONDUCTOR DEVICE, POWER CIRCUIT, AND COMPUTER
A semiconductor device according to an embodiment includes a nitride semiconductor layer and an insulating layer including an oxide film or an oxynitride film...
2018/0026123 BOND-OVER-ACTIVE CIRCUITY GALLIUM NITRIDE DEVICES
Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate...
2018/0026122 B-TRAN Geometry and Structure That Provides Both High Gain and High Current Density
Three optimizations are provided for B-TRAN devices which include field plate trenches: 1) the trench dielectric thickness is large enough to withstand the...
2018/0026121 INSULATED GATE TURN-OFF DEVICE WITH TURN-OFF SCHOTTKY-BARRIER MOSFET
An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n- epi layer, a p-well,...
2018/0026120 PUNCH THROUGH STOPPER IN BULK FINFET DEVICE
A method of forming a semiconductor device that includes forming a fin structure from a bulk semiconductor substrate and forming an isolation region contacting...
2018/0026119 FinFETs and Methods for Forming the Same
A FinFET includes a semiconductor fin including an inner region, and a germanium-doped layer on a top surface and sidewall surfaces of the inner region. The...
2018/0026118 MULTIPLE STEP THIN FILM DEPOSITION METHOD FOR HIGH CONFORMALITY
During a physical vapor deposition (PVD) process, the ion energy of a depositing species is controlled. By varying the ion energy throughout the process, the...
2018/0026117 DISPLAY DEVICE
The present disclosure provides a display device, including: a gate line and a data line; a pixel array; a gate driver, configured to provide a gate signal to...
2018/0026115 TRANSISTOR WITH CONTACTED DEEP WELL REGION
Various methods and devices that involve body contacted transistors are disclosed. An exemplary method comprises forming a gate on a planar surface of a...
2018/0026114 UNIPOLAR SPACER FORMATION FOR FINFETS
A method for forming a spacer for a semiconductor device includes patterning gate material in a transverse orientation relative to semiconductor fins formed on...
2018/0026113 FIN-BASED RF DIODES
Methods for forming a fin-based RF diode with improved performance characteristics and the resulting devices are disclosed. Embodiments include forming fins...
2018/0026112 SEMICONDUCTOR DEVICE HAVING MULTIWORK FUNCTION GATE PATTERNS
A semiconductor device includes a semiconductor substrate having a first area and a second area, and a first gate pattern on the first area and a second gate...
2018/0026111 LOW-RESISTIVE, CMOS-COMPATIBLE, AU-FREE OHMIC CONTACT TO N-INP
A device includes an n-doped InP layer and an ohmic contact, in contact with the n-doped InP layer. The ohmic contact includes an annealed stack of at least...
2018/0026110 POWER ELECTRONIC SWITCHING DEVICE, ARRANGEMENT HEREWITH AND METHODS FOR PRODUCING THE SWITCHING DEVICE
A switching device has a substrate and a power semiconductor component, comprising a connection device and a pressure device wherein the substrate has tracks...
2018/0026109 SEMICONDUCTOR DEVICE
A semiconductor device may include a semiconductor substrate; a first metal film covering a surface of the semiconductor substrate; a protection film covering...
2018/0026108 SEMICONDUCTOR DEVICE, POWER CIRCUIT, AND COMPUTER
A semiconductor device according to an embodiment includes a nitride semiconductor layer, an insulating layer provided on the nitride semiconductor layer, a...
2018/0026107 SEMICONDUCTOR DEVICE, POWER CIRCUIT, COMPUTER, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device according to an embodiment includes a nitride semiconductor layer, an insulating layer provided on the nitride semiconductor layer, a...
2018/0026106 Enhancement Mode Field-Effect Transistor with a Gate Dielectric Layer Recessed on a Composite Barrier Layer for...
An enhancement mode field-effect transistor (E-FET) for high static performance is provided. A composite barrier layer comprises a lower barrier layer and an...
2018/0026105 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device is disclosed, comprising: a substrate; a semiconductor layer disposed on the substrate; a source electrode and a drain electrode...
2018/0026104 P-TYPE OXIDE SEMICONDUCTOR, METHOD FOR FORMING P-TYPE OXIDE SEMICONDUCTOR, AND TRANSISTOR WITH THE P-TYPE OXIDE...
Provided are a p-type oxide semiconductor, a method of forming the p-type oxide semiconductor, and a transistor with the p-type oxide semiconductor. The p-type...
2018/0026103 TRANSISTOR, THIN-FILM TRANSISTOR SUBSTRATE, AND LIQUID CRYSTAL DISPLAY
The present technique relates to a transistor that uses an oxide semiconductor as its channel layer and that is capable of suppressing fluctuations in...
2018/0026102 Power semiconductor device
A power semiconductor device is described. The device comprises a silicon carbide substrate and a layer of monocrystalline silicon having a thickness t.sub.Si...
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