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Patent # Description
2018/0025798 FINNED STRAINER
The present invention relates to filters used to remove debris from water being sucked into a piping system. It has particular application use in nuclear power...
2018/0025797 METHODS OF FORMING STRUCTURES AND FISSILE FUEL MATERIALS BY ADDITIVE MANUFACTURING AND RELATED STRUCTURES
A method of forming one or more structures by additive manufacturing comprises introducing a first layer of a powder mixture comprising graphite and a fuel on...
2018/0025796 APPARATUS FOR SUPPORTING RADIOACTIVE FUEL ASSEMBLIES AND METHODS OF MANUFACTURING THE SAME
An apparatus for supporting radioactive fuel assemblies, such as spent nuclear fuel. In one aspect, the invention is an apparatus, which can be in the form of...
2018/0025795 SEISMIC ATTENUATION SYSTEM FOR A NUCLEAR REACTOR
A system for attenuating seismic forces includes a reactor pressure vessel containing nuclear fuel and a containment vessel that houses the reactor pressure...
2018/0025794 SPRAY METHODS FOR COATING NUCLEAR FUEL RODS TO ADD CORROSION RESISTANT BARRIER
A method is described herein for coating the substrate of a component for use in a water cooled nuclear reactor to provide a barrier against corrosion. The...
2018/0025793 COLD SPRAY CHROMIUM COATING FOR NUCLEAR FUEL RODS
A method is provided for coating the substrate of a component, such as a zirconium alloy cladding tube, for use in a water cooled nuclear reactor under normal...
2018/0025792 METHOD AND APPARATUS FOR THE GENERATION, HEATING AND/OR COMPRESSION OF PLASMOIDS AND/OR RECOVERY OF ENERGY...
Method and apparatus for heating and/or compressing plasmas to thermonuclear temperatures and densities are provided. In one aspect, at least one of at least...
2018/0025791 Plasma Confinement System and Methods for Use
A plasma confinement system is provided that includes a confinement chamber that includes one or more enclosures of respective helicity injectors. The one or...
2018/0025790 REDUNDANT COLUMN OR ROW IN RESISTIVE RANDOM ACCESS MEMORY
Examples include a resistive random access memory (RRAM) array to support a redundant column. Some examples include an RRAM cell at a cross point of a column...
2018/0025789 SHARED ERROR DETECTION AND CORRECTION MEMORY
Apparatuses and methods for an interface chip that interfaces with chips are described. An example apparatus includes: first terminals; circuit groups, each of...
2018/0025788 METHODS OF OPERATING BUFFERED MULTI-RANK MEMORY MODULES CONFIGURED TO SELECTIVELY LINK RANK CONTROL SIGNALS
A method of operating a memory module including a plurality of semiconductor memory devices organized into a multi-rank memory on a DIMM and a memory buffer...
2018/0025787 AUTOMATIC TEST-PATTERN GENERATION FOR MEMORY-SHADOW-LOGIC TESTING
An embodiment of a method for automated test pattern generation (ATPG), a system for ATPG, and a memory configured for ATPG. For example, an embodiment of a...
2018/0025786 METHOD AND APPARATUS FOR IMPLEMENTING DISAGGREGATED MEMORY PLATTERS
A method and apparatus may include determining a failure of a drive. The drive comprises a plurality of platters, each platter comprises two half-platters, and...
2018/0025785 ONE-TIME PROGRAMMABLE MEMORY DEVICE
Provided is a one-time programmable (OTP) memory device, which includes a data input circuit that receives a supply voltage and applies the supply voltage to...
2018/0025784 MEMORY DEVICE AND OPERATING METHOD THEREOF
Disclosed are a memory device, including: a memory block including a plurality of cell strings; a peripheral circuit configured to set voltages for a program...
2018/0025783 NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory includes a channel layer; a data storage layer disposed...
2018/0025782 SYSTEMS AND METHODS FOR PROGRAMMING DATA TO STORAGE DEVICES
Receiving one or more first write commands to write a first set of data to a storage device. The first set of data is programmed in a plurality of memory cells...
2018/0025781 INTEGRATED ERASE VOLTAGE PATH FOR MULTIPLE CELL SUBSTRATES IN NONVOLATILE MEMORY DEVICES
A non-volatile memory device using existing row decoding circuitry to selectively provide a global erase voltage to at least one selected memory block in order...
2018/0025780 Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Including Resistance Change Material...
Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein...
2018/0025779 Nonvolatile Nanotube Switches and Systems Using Same
A non-volatile nanotube switch and memory arrays constructed from these switches are disclosed. A non-volatile nanotube switch includes a conductive terminal...
2018/0025778 NON-VOLATILE MEMORY DEVICE
A non-volatile memory device of the present disclosure includes: a plurality of bit lines; a plurality of word lines; a memory cell array having a plurality of...
2018/0025777 HIGH-RELIABILITY MEMORY READ TECHNIQUE
A data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured, based on a metric...
2018/0025776 System and Method for Burst Programming Directly to MLC Memory
Apparatus and method for performing burst mode programming in a memory system are disclosed. A memory system may program data in different modes, such as...
2018/0025775 MEMORY CELL HAVING A MAGNETIC JOSEPHSON JUNCTION DEVICE WITH A DOPED MAGNETIC LAYER
Examples described in this disclosure relate to a memory cell having a magnetic Josephson junction device with a doped magnetic layer. In one example, a memory...
2018/0025774 Memory Cell of Static Random Access Memory Based on Resistance Hardening
The present invention provides a memory cell of a static random access memory based on resistance reinforcement, which includes a latch circuit and a bit...
2018/0025773 PRECHARGING AND REFRESHING BANKS IN MEMORY DEVICE WITH BANK GROUP ARCHITECTURE
Memory subsystem refresh management enables commands to access one or more identified banks across different bank groups with a single command. Instead of...
2018/0025772 SEMICONDUCTOR DEVICES HAVING A REFRESH OPERATION
A semiconductor device includes a first row address generation circuit and a second row address generation circuit. The first row address generation circuit...
2018/0025771 DIRECTED PER BANK REFRESH COMMAND
A memory device includes a per bank refresh counter applicable to multiple banks in a group. The memory device increments a row address counter only when the...
2018/0025770 SEMICONDUCTOR DEVICE
A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC, a plurality of word lines WL each coupled to a...
2018/0025769 REFRESH CONTROL CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
A refresh control circuit may be provided. The refresh control circuit may include a row address control circuit configured to reset a corresponding block...
2018/0025768 UTILIZATION OF DATA STORED IN AN EDGE SECTION OF AN ARRAY
An example apparatus includes a memory device having first sensing circuitry positioned adjacent an edge of an edge array section and selectably coupled to a...
2018/0025766 Integrated Memory Device and Method of Operating Same
An integrated circuit memory contains a memory cell connected to a bit line that does not float during a portion or all of the read sensing part of the read...
2018/0025765 SEMICONDUCTOR DEVICE
A semiconductor device includes a flip-flop circuit, a control line, a first P-type transistor and a first non-volatile storage element, and a second P-type...
2018/0025764 MAGNETIC FIELD-ASSISTED MEMORY OPERATION
In one embodiment, a magnetoresistance random access memory (MRAM) such as a spin transfer torque (STT) random access memory (RAM), for example, has a subarray...
2018/0025763 MAGNETIC MEMORY
According to one embodiment, the magnetic memory includes a structure including a first magnetic layer and a conductive layer, a second magnetic layer, an...
2018/0025762 SEMICONDUCTOR DEVICE INCLUDING A COLUMN DECODER
A semiconductor device may be provided. The semiconductor device may include a first power line located in a memory cell array region. The semiconductor device...
2018/0025761 READ LATENCY REDUCTION IN A MEMORY DEVICE
A memory device can include: a memory array with memory cells arranged as data lines; an interface that receives a read command requesting bytes of data in a...
2018/0025760 APPARATUSES AND METHODS INCLUDING NESTED MODE REGISTERS
Apparatuses and methods for nested mode registers to extend mode register functionality are disclosed. An example apparatus comprises a mode register...
2018/0025759 SHIFTING DATA IN SENSING CIRCUITRY
The present disclosure includes apparatuses and methods related to shifting data. An example apparatus comprises sensing circuitry including a sense amplifier...
2018/0025758 APPARATUSES AND METHODS FOR STORING A DATA VALUE IN A SENSING CIRCUITRY ELEMENT
The present disclosure includes apparatuses and methods related to storing a data value in a sensing circuitry element. An example method comprises sensing a...
2018/0025757 METHOD AND APPARATUS FOR SERIAL DATA OUTPUT IN MEMORY DEVICE
A memory device includes a memory array storing data, a sense amplifier configured to read a plurality of data bits from the memory array and output a sense...
2018/0025756 ELECTRONIC DEVICE AND CONTROL METHOD WITH INSTRUCTION UNITS BASED ON A NUMBER OF POWER SUPPLY OFF OPERATIONS
An electronic device includes a storage device and a plurality of instruction units. The plurality of instruction units respectively instruct to turn off a...
2018/0025755 SEMICONDUCTOR DEVICE
The present invention provides a semiconductor device that can reduce the power consumption. The semiconductor device includes a plurality of sub-blocks each...
2018/0025754 RECORDING APPARATUS, REPRODUCING APPARATUS, RECORDING/REPRODUCING APPARATUS, IMAGE PICKUP APPARATUS, RECORDING...
A recording apparatus is disclosed. The recording apparatus includes a data input portion configured to input data, a first moving image signal recording...
2018/0025753 IMMERSIVE VIRTUAL REALITY PRODUCTION AND PLAYBACK FOR STORYTELLING CONTENT
Methods for digital content production and playback of an immersive stereographic video work provide or enhance interactivity of immersive entertainment using...
2018/0025752 Methods and Systems for Customizing Immersive Media Content
A computing system has memory, a microphone, and an image sensor. A process displays an immersive media customization user interface, and plays a 360 video. In...
2018/0025751 Methods and System for Customizing Immersive Media Content
A computing device has memory, a microphone, and an image sensor. A process plays an immersive video in a user interface region, which displays a portion of...
2018/0025750 Systems and Methods for Featuring a Person in a Video Using Performance Data Associated with the Person
There is provided a system comprising a non-transitory memory and a hardware processor configured to determine elements of a performance in a video, identify...
2018/0025749 AUTOMATIC GENERATION OF SEMANTIC-BASED CINEMAGRAPHS
Described are various technologies that pertain to automatically generating looped videos or cinemagraphs by selecting objects to animate from an input video....
2018/0025748 Lubricant for Magnetic Recording Medium, and Magnetic Recording Medium
A lubricant for a magnetic recording medium including an ionic liquid including a Bronsted acid and a Bronsted base that is primary amine as constituents of...
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