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Patent # Description
2018/0033775 Packages with Die Stack Including Exposed Molding Underfill
A method includes bonding a first device die onto a top surface of a package substrate, and performing an expose molding on the first device die and the...
2018/0033774 SEMICONDUCTOR PACKAGE ASSEMBLY WITH PASSIVE DEVICE
A semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly...
2018/0033773 PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
A package structure and method for forming the same are provided. The package structure includes a first die, and the first die includes a first magnetic pad...
2018/0033772 SEMICONDUCTOR DEVICE HAVING A RIB STRUCTURE AND MANUFACTURING METHOD OF THE SAME
A semiconductor device is provided. The semiconductor device includes at least one first die, a rib structure enclosing the at least one first die, and a...
2018/0033771 PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
An embodiment is a structure including a first die, a molding compound at least laterally encapsulating the first die, a first redistribution structure...
2018/0033770 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor package structure includes an encapsulant, a first chip, a second chip, a first redistribution layer and a second redistribution layer. The...
2018/0033769 STACKED PHOTODETECTORS
In examples provided herein, an optical fiber distribution node stacked photodetector can include a stack of photodetector structures. The photodetector...
2018/0033768 Flat panel display formed by self aligned assembly
An LED display can be fabricated by assembling micro LED chips on a backplane substrate. The micro LED chips can be assembled using a flip chip process,...
2018/0033767 Device Package with Reduced Thickness and Method for Forming Same
A device package includes a die and a molding compound around the die. The molding compound has a non-planar surface recessed from a top surface of the die....
2018/0033766 DEVICE PACKAGING FACILITY AND METHOD, AND DEVICE PROCESSING APPARATUS UTILIZING DEHT
Provided are a device packing facility and method using DEHT and a device processing apparatus utilizing the DEHT. The device packaging facility includes a...
2018/0033765 ELECTRONIC DEVICE HAVING AN UNDER-FILL ELEMENT, A MOUNTING METHOD OF THE SAME, AND A METHOD OF MANUFACTURING A...
A mounting method of an electronic device includes providing an electronic device which includes a semiconductor chip body including an upper surface, a lower...
2018/0033764 Wire Bonding Method and Apparatus for Electromagnetic Interference Shielding
Apparatuses relating generally to a microelectronic package having protection from electromagnetic interference are disclosed. In an apparatus thereof, a...
2018/0033763 PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF AND PACKAGE
A package substrate including a carrier, a first patterned conductive layer, a second patterned conductive layer and a 3D-printing conductive wire is provided....
2018/0033762 ULTRA-THIN EMBEDDED SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THEREOF
A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the...
2018/0033761 SOLDER MATERIAL FOR SEMICONDUCTOR DEVICE
To provide a lead-free solder the heat resistance temperature of which is high and thermal conductive property of which are not changed in a high temperature...
2018/0033760 CONDUCTIVE JOINING MATERIAL AND CONDUCTIVE JOINING STRUCTURE WHICH USE METAL PARTICLES AND CONDUCTIVE MATERIAL...
A conductive joining material and conductive joined structure for joining two joining members by a joining layer using metal nanoparticles at the time of which...
2018/0033759 SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
Semiconductor packages and methods for forming a semiconductor package are disclosed. The method includes providing a package substrate having first and second...
2018/0033758 METHOD AND APPARATUS FOR MAKING INTEGRATED CIRCUIT PACKAGES
A method of making a plurality of integrated circuit ("IC") packages includes picking up a plurality of physically unconnected IC components; and...
2018/0033757 SEMICONDUCTOR DEVICE
In the semiconductor device, a bump electrode which connects a semiconductor chip and a wiring board is made up of a first part surrounded by an insulating...
2018/0033756 METHOD FOR FORMING BUMP STRUCTURE
Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a metal pad over a first substrate...
2018/0033755 INTEGRATED CIRCUIT CHIP AND DISPLAY DEVICE INCLUDING THE SAME
An exemplary embodiment provides a driving circuit chip including: a substrate; a terminal electrode disposed on the substrate; and an electrode pad disposed...
2018/0033754 TOOLING FOR COUPLING MULTIPLE ELECTRONIC CHIPS
A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding...
2018/0033753 HETEROGENEOUS BALL PATTERN PACKAGE
Methods and apparatus are described for strategically arranging conductive elements (e.g., solder balls) of an integrated circuit (IC) package (and the...
2018/0033752 Molded Semiconductor Package Having an Optical Inspection Feature
A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main...
2018/0033751 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an...
2018/0033750 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
A method of manufacturing a semiconductor structure include: providing a die including a die pad disposed over the die; disposing a conductive member over the...
2018/0033749 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
The present disclosure provides a semiconductor structure. The semiconductor structure comprises a semiconductive substrate and an interconnect structure over...
2018/0033748 RESURFACEABLE CONTACT PAD FOR SILICON or ORGANIC REDISTRIBUTION INTERPOSER FOR SEMICONDUCTOR PROBING
The present invention relates to a method and an apparatus for a resurfaceable contact pad that uses an epoxy to encapsulate contact pads so that the epoxy and...
2018/0033747 Fan-Out Package and Methods of Forming Thereof
An embodiment is a structure including a molding compound laterally encapsulating a chip with a contact pad. A first dielectric layer is formed overlying the...
2018/0033746 ELECTRONIC COMPONENT PACKAGE
An electronic component package includes: a frame, including a through-hole and a through-wiring; an electronic component disposed in the through-hole of the...
2018/0033745 SEMICONDUCTOR DEVICE HAVING A DUAL MATERIAL REDISTRIBUTION LINE AND METHOD OF FORMING THE SAME
A semiconductor device includes a first passivation layer over an interconnect structure. The semiconductor device further includes a first redistribution line...
2018/0033744 MONOLITHIC MICROWAVE INTEGRATED CIRCUIT (MMIC) AND METHOD FOR FORMING SUCH MMIC HAVING RAPID THERMAL ANNEALING...
A method and structure, the structure having a substrate, an active device in an active device semiconductor region; of the substrate, a microwave transmission...
2018/0033743 SEMICONDUCTOR DEVICE
A semiconductor device equipped with a base board, a first element, a second element, and an interposer board, wherein: the first element is positioned on the...
2018/0033742 SENSOR AND HEATER FOR STIMULUS-INITIATED SELF-DESTRUCTING SUBSTRATE
A self-destructing device includes a stressed substrate with a heater thermally coupled to the stressed substrate. The device includes a power source and...
2018/0033741 ELECTRONIC PACKAGE THAT INCLUDES MULTI-LAYER STIFFENER
An electronic package that includes a substrate and a die attached to the substrate. The electronic package further includes a stiffener that is attached to...
2018/0033740 Dummy Fin Etch to Form Recesses in Substrate
An integrated circuit structure includes a semiconductor substrate having a plurality of semiconductor strips, a first recess being formed by two adjacent...
2018/0033739 SEMICONDUCTOR WAFER AND METHOD OF REDUCING WAFER THICKNESS WITH ASYMMETRIC EDGE SUPPORT RING ENCOMPASSING WAFER...
A semiconductor wafer has a base material with a first thickness and first and second surfaces. A wafer scribe mark is disposed on the first surface of the...
2018/0033738 ELECTRONIC CIRCUIT PACKAGE
Disclosed herein is an electronic circuit package includes a substrate having a power supply pattern, a first electronic component mounted on a first region of...
2018/0033737 SELF-SHIELDED DIE HAVING ELECTROMAGNETIC SHIELDING ON DIE SURFACES
A self-shielded die includes a substrate, an electronic device attached to the substrate, one or more electrical pads disposed on a bottom surface of the...
2018/0033736 SEMICONDUCTOR DEVICE PACKAGES
A semiconductor device package includes a substrate, a component on a surface of the substrate, a package body encapsulating the component, and an...
2018/0033735 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor substrate having a first surface, which includes an element forming region and an element isolation region, and...
2018/0033734 METHOD FOR FABRICATING CU INTERCONNECTION USING GRAPHENE
A method for manufacturing an interconnect structure includes providing a substrate structure comprising a substrate, a first dielectric layer on the...
2018/0033733 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes a frame having a through hole, a semiconductor chip disposed in the through hole and including connection pads, an...
2018/0033732 WIRING BOARD
A wiring board includes conductor layers, core layers including a first core layer and a second core layer formed such that each of the first and second core...
2018/0033731 ELECTRONIC DEVICE
An electronic device includes a first wiring substrate and a semiconductor device mounted on the first wiring substrate. The semiconductor device includes a...
2018/0033730 SEMICONDUCTOR DEVICE STRUCTURE
A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first...
2018/0033729 STANDARD CELL CIRCUITS EMPLOYING HIGH ASPECT RATIO VOLTAGE RAILS FOR REDUCED RESISTANCE
Standard cell circuits employing high aspect ratio voltage rails for reduced resistance are disclosed. In one aspect, a standard cell circuit is provided that...
2018/0033728 IC STRUCTURE WITH INTERFACE LINER AND METHODS OF FORMING SAME
Embodiments of the present disclosure may provide a method of forming an integrated circuit (IC) structure, the method including: providing a structure with: a...
2018/0033726 PROGRAMMABLE VIA DEVICES WITH METAL/SEMICONDUCTOR VIA LINKS AND FABRICATION METHODS THEREOF
Programmable via devices and fabrication methods thereof are presented. The programmable via devices include, for instance, a first metal layer and a second...
2018/0033725 DUAL-MODE WIRELESS CHARGING DEVICE
A semiconductor device includes a first molding layer; a second molding layer formed over the first molding layer; a first conductive coil including a first...
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