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Patent # Description
2018/0033674 SUBSTRATE PROCESSING APPARATUS AND METHOD OF OPERATING THE SAME
Provided is a substrate processing apparatus in which parts are selectively lifted according to the purpose or subject of maintenance/repair during a...
2018/0033673 SUBSTRATE SUPPORT WITH IN SITU WAFER ROTATION
Embodiments of methods and apparatus for processing a substrate are provided herein. In some embodiments, a substrate support includes a base having a first...
2018/0033672 SUBSTRATE SUPPORT WITH INCREASING AREAL DENSITY AND CORRESPONDING METHOD OF FABRICATING
A substrate support for a substrate processing system is provided and includes a body and mesas. The mesas are distributed across and extending from and in a...
2018/0033671 Methods for masking a pin chuck, and articles made thereby
A method for selectively coating the tops of pins of a pin chuck with a high thermal stability material, such as diamond-like carbon (DLC). Non-pin areas...
2018/0033670 METHOD FOR REALIZING ULTRA-THIN SENSORS AND ELECTRONICS WITH ENHANCED FRAGILITY
A method of fabricating ultra-thin semiconductor devices includes forming an array of semiconductor dielets mechanically suspended on a frame with at least one...
2018/0033669 ELECTRONIC DEVICE AND A PROCESS FOR FORMING THE SAME
An electronic device can include a semiconductor material and a semiconductor layer overlying the semiconductor material, wherein the semiconductor layer has a...
2018/0033668 CERAMIC MEMBER
This ceramic member 100 includes: a ceramic base body 10 having a terminal 30 embedded therein; a blind hole 11 formed in the ceramic base body 10 and causing...
2018/0033667 WAFER EDGE MEASUREMENT AND CONTROL
Devices and methods are provided for positioning and/or rotating a substrate without solid contact, such as by floating the wafer on a thin layer of gas. Since...
2018/0033666 TEACHING JIG, SUBSTRATE PROCESSING APPARATUS, AND TEACHING METHOD
A teaching jig includes: a first plate that determines a substrate loading position in a forward/backward direction with respect to a substrate holder which...
2018/0033665 WAFER BOX, METHOD FOR ARRANGING WAFERS IN A WAFER BOX, WAFER PROTECTION PLATE AND METHOD FOR PROTECTING A WAFER
Various embodiments provide a wafer box. The wafer box may include a housing with a receiving space for receiving at least one wafer arranged above a housing...
2018/0033664 ATMOSPHERE FORMATION APPARATUS AND FLOATATION CONVEYANCE METHOD
The invention is an atmosphere formation apparatus that is provided in a floatation conveyance apparatus, the floatation conveyance apparatus conveying a...
2018/0033663 CARRIER TRANSPORT DEVICE AND CARRIER TRANSPORT METHOD
A carrier transport device capable of delivering a carrier to and from an external transport device which transports the carrier is provided. The carrier...
2018/0033662 WAFER BOX, WAFER STACKING AID, WAFER CARRIER, WAFER TRANSPORT SYSTEM, METHOD FOR LOADING A WAFER BOX WITH...
In various embodiments, a wafer box is provided. The wafer box may include a housing with a receiving space for receiving a stack comprising a plurality of...
2018/0033661 SUBSTRATE TREATING SYSTEM
Disclosed is a substrate treating system. The substrate treating system includes an index unit having a port, on which a container containing a substrate is...
2018/0033660 THERMAL PROCESSING APPARATUS AND THERMAL PROCESSING METHOD
An upper plate on which a substrate is placed is cooled or heated by a thermal processor. The temperature of the thermal processor is adjusted by a temperature...
2018/0033659 GAS PURGE SYSTEM AND METHOD FOR OUTGASSING CONTROL
Embodiments disclosed herein generally relate to a system, method, and apparatus for controlling substrate outgassing such that hazardous gasses are eliminated...
2018/0033658 APPARATUS AND METHOD FOR COMPONENT ASSEMBLY
Apparatus (200, 300, 400) for component positioning comprises at least one receptacle (212, 412) configured to receive a number of components (103) to be...
2018/0033657 PRESSURE PURGE ETCH METHOD FOR ETCHING COMPLEX 3-D STRUCTURES
A method for etching a substrate and removing byproducts includes a) setting process parameters of a processing chamber for a selective dry etch process; b)...
2018/0033656 SUBSTRATE PROCESSING APPARATUS AND NOZZLE
After a discharge of a processing liquid is stopped, a position of a liquid surface within a nozzle can be observed. A substrate processing apparatus includes...
2018/0033655 APPARATUS AND METHOD FOR TREATING SUBSTRATE
Disclosed are an apparatus and a method for treating a substrate. The method includes supplying a mixture liquid obtained by mixing an additive with an organic...
2018/0033654 A FALL-PROOF APPARATUS FOR CLEANING SEMICONDUCTOR DEVICES AND A CHAMBER WITH THE APPARATUS
A fall-proof apparatus for cleaning semiconductor devices is provided. The fall-proof apparatus comprises: a nozzle (102) connecting with a carrier (101); a...
2018/0033653 PROCESSING APPARATUS AND METHOD
A processing apparatus includes a spin coating chamber, an ultraviolet curing chamber, a transfer module and an enclosure. The transfer module is assigned with...
2018/0033652 FLOW CONTROLLED LINER HAVING SPATIALLY DISTRIBUTED GAS PASSAGES
Embodiments of the present disclosure provide a liner assembly including a plurality of individually separated gas passages. The liner assembly enables...
2018/0033651 PROCESSING LIQUID GENERATOR AND SUBSTRATE PROCESSING APPARATUS USING THE SAME
According to one embodiment, a processing liquid generator capable of improving the reliability of the concentration of generated processing liquid is...
2018/0033650 Packaged Semiconductor Devices and Methods of Packaging Semiconductor Devices
Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an...
2018/0033649 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
The reliability of a semiconductor device is improved. In a manufacturing method of a semiconductor device, when resin enters a ditch formed on a lower surface...
2018/0033648 EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS CONTAINING SAME
A reconstituted wafer includes a rigid mass with a flat surface and a base surface disposed parallel planar to the flat surface. A plurality of dice are...
2018/0033647 SAWN LEADLESS PACKAGE HAVING WETTABLE FLANK LEADS
A method of forming a leadless packaged semiconductor device. First partial sawing leads is performed on a bottom side of an in-process leadless semiconductor...
2018/0033646 THREE-DIMENSIONAL MEMORY DEVICE CONTAINING COMPOSITE WORD LINES INCLUDING A METAL SILICIDE AND AN ELEMENTAL...
Word lines for a three-dimensional memory device can be formed by forming a stack of alternating layers comprising insulating layers and sacrificial material...
2018/0033645 SUBSTRATE PROCESSING APPARATUS, LID COVER AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A technique capable of preventing by-products from adhering to a lower portion of a process vessel utilizes a substrate processing apparatus including: a...
2018/0033644 FILM FORMING METHOD AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR
Provided is a film forming method to minimize decreases in the electrical resistance of an oxide semiconductor film even when a fluorinated silicon nitride...
2018/0033643 METHODS AND APPARATUS FOR USING ALKYL AMINES FOR THE SELECTIVE REMOVAL OF METAL NITRIDE
Improved methods and apparatus for removing a metal nitride selectively with respect to exposed or underlying dielectric or metal layers are provided herein....
2018/0033642 THIN FILM TRANSISTOR, ARRAY SUBSTRATE, AND DISPLAY APPARATUS, AND THEIR FABRICATION METHODS
The present disclosure provides a thin film transistor, a thin film transistor array substrate, and a display apparatus, and their fabrication methods. The...
2018/0033641 UNIFORM BACK SIDE EXPOSURE OF THROUGH-SILICON VIAS
Systems and methods for uniform back side exposure of through-silicon vias (TSVs) are disclosed. In one embodiment, a semiconductor device comprises a...
2018/0033640 HEAT TREATMENT METHOD FOR P-TYPE SEMICONDUCTOR
A substrate having a germanium semiconductor layer doped with a dopant such as boron is carried in a chamber. A treatment gas containing hydrogen is supplied...
2018/0033639 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
A method of manufacturing a semiconductor device includes alternately stacking mold insulating layers and sacrificial layers on a substrate; forming channel...
2018/0033638 METHOD FOR WET ETCHING OF BLOCK COPOLYMER SELF-ASSEMBLY PATTERN
The present invention relates to a process for selectively removing a block on one side using a wet etching process in connection with self-assembly block...
2018/0033637 METHODS FOR FABRICATING SEMICONDUCTOR DEVICES
Example embodiments relate to a method for fabricating a semiconductor device. The method for fabricating a semiconductor device includes stacking on a...
2018/0033636 METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE
A method of fabricating a semiconductor structure is provided. A substrate surface is provided and a first layer is disposed on the substrate surface. A second...
2018/0033635 INTEGRATING ATOMIC SCALE PROCESSES: ALD (ATOMIC LAYER DEPOSITION) AND ALE (ATOMIC LAYER ETCH)
Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve...
2018/0033634 ETCHING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR CHIP, AND METHOD OF MANUFACTURING ARTICLE
An etching method according to an embodiment includes forming a catalyst layer made of a first noble metal or the combination of the second noble metal and the...
2018/0033633 METHOD FOR PLANARIZING MATERIAL LAYER
A method for planarizing a silicon layer includes providing a silicon layer having at least one recess therein. Next, a photoresist layer is formed to cover...
2018/0033632 SUBSTRATE TREATING APPARATUS AND SUBSTRATE TREATING METHOD
Disclosed is a substrate treating apparatus. The substrate treating apparatus includes a spin head configured to support the substrate, a cup surrounding an...
2018/0033631 SELF-ALIGNING SOURCE, DRAIN AND GATE PROCESS FOR III-V NITRIDE MISHEMTS
A method for fabrication of high electron mobility transistor (HEMT) semiconductor devices is presented. The method includes providing a substrate, growing a...
2018/0033630 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method of manufacturing a source structure for a p-type metal-oxide-semiconductor (PMOS) field effect transistor (FET) is provided. In the method, a first...
2018/0033629 INTEGRATED CIRCUIT ELEMENT AND FABRICATING METHOD THEREOF, CIRCUIT BOARD, DISPLAY PANEL AND DISPLAY DEVICE
An integrated circuit element and a fabrication method thereof, a circuit board, a display panel and a display device are provided, to reduce space occupied by...
2018/0033628 HEAT TREATMENT METHOD FOR P-TYPE SEMICONDUCTOR
A germanium semiconductor layer doped with a dopant such as boron becomes a p-type semiconductor. The semiconductor layer is preheated at a preheating...
2018/0033626 Doping Through Diffusion and Epitaxy Profile Shaping
A method includes etching a semiconductor substrate to form a first trench and a second trench. A remaining portion of the semiconductor substrate is left...
2018/0033625 METHOD OF PROCESSING SUBSTRATE
A method of processing a substrate to enable selective doping without a photolithography process is provided. The method includes forming a diffusion barrier...
2018/0033624 SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC DEVICE
A method for manufacturing a semiconductor device may include the following steps: preparing a first substrate; providing a first conductor, which is...
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