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Patent # Description
2018/0040545 Method Of Fabricating Low Profile Leaded Semiconductor Package
In a semiconductor package a lead having a bottom surface coplanar with the flat bottom surface of the plastic body extends outward at the bottom of the...
2018/0040544 Multi-surface edge pads for vertical mount packages and methods of making package stacks
Multi-surface edge pads for vertical mount packages and methods of making package stacks are provided. Example substrates for vertical surface mount to a...
2018/0040543 LEAD FRAME AND METHOD FOR MANUFACTURING SAME
Provided is a lead frame including: one or more solder bonding regions containing copper material or copper plating; and a molding resin adhesion region...
2018/0040542 MANUFACTURING METHOD OF SEMICONDUCTOR MODULE AND SEMICONDUCTOR MODULE
A manufacturing method of a semiconductor module includes: sealing an assembly with resin, the assembly including a semiconductor chip, a heat-dissipation...
2018/0040541 SEMICONDUCTOR CHIP PACKAGE HAVING HEAT DISSIPATING STRUCTURE
Disclosed herein is a semiconductor chip package having a heat dissipating structure. The semiconductor chip package including: a semiconductor chip configured...
2018/0040540 POWER MODULE AND MOTOR DRIVE CIRCUIT
A power module includes a first die pad, a first switching element, a second die pad, a second switching element, an integrated circuit element, an...
2018/0040539 QUAD FLAT NO LEADS PACKAGE
Implementations of semiconductor packages may include: a lead frame having at least one corner lead, the at least one corner lead positioned where two edges of...
2018/0040538 POWER ELECTRONICS MODULE
A power electronics module comprises a first liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the first liquid cooler...
2018/0040537 Package with partially encapsulated cooling channel for cooling an encapsulated chip
A power module which comprises a semiconductor chip, at least one cooling plate with at least one cooling channel thermally coupled to the semiconductor chip...
2018/0040536 SINGLE BASE MULTI-FLOATING SURFACE COOLING SOLUTION
An apparatus including a primary device and at least one secondary device coupled to a substrate; a heat exchanger disposed on the primary device and on the at...
2018/0040535 BONDED BODY, SUBSTRATE FOR POWER MODULE WITH HEAT SINK, HEAT SINK, METHOD FOR PRODUCING BONDED BODY, METHOD FOR...
A bonded body is provided in which an aluminum alloy member formed from an aluminum alloy, and a metal member formed from copper, nickel, or silver are bonded...
2018/0040534 SEMICONDUCTOR MODULE
A semiconductor module includes a first recessed portion and a second recessed portion formed in an insulating plate at positions close to a first long side...
2018/0040533 MANUFACTURING METHOD FOR JUNCTION, MANUFACTURING METHOD FOR SUBSTRATE FOR POWER MODULE WITH HEAT SINK, AND...
A method of manufacturing a bonded body is provided in which a copper member (13B) formed from copper or a copper alloy, and an aluminum member (31) formed...
2018/0040532 HEAT SINK
Examples disclosed herein relate to a heat sink. Examples include a thermoconductive base thermally coupled to a device. Examples include a fin thermally...
2018/0040531 METHOD OF MAKING INTERCONNECT SUBSTRATE HAVING ROUTING CIRCUITRY CONNECTED TO POSTS AND TERMINALS
A method of making an interconnect substrate includes steps of: providing a base and a plurality of posts projecting from the base, providing a dielectric...
2018/0040530 Die Attach Methods and Semiconductor Devices Manufactured based on Such Methods
A semiconductor device includes a carrier, a semiconductor die and a die attach material arranged between the carrier and the semiconductor die. A fillet...
2018/0040529 Remapped Packaged Extracted Die with 3D Printed Bond Connections
An integrated circuit is provided. The integrated circuit includes a package base including package leads, an extracted die removed from a previous packaged...
2018/0040528 CERAMIC SUBSTRATE AND METHOD FOR PRODUCING A CERAMIC SUBSTRATE
The present invention relates to a ceramic substrate (100) comprising: a front side (100-1), which comprises: i) a power semiconductor (102-1, . . . , 102-n);...
2018/0040527 SILICON PACKAGE HAVING ELECTRICAL FUNCTIONALITY BY EMBEDDED PASSIVE COMPONENTS
A packaged electronic system comprises a slab (210) of low-grade silicon (I-g-Si) configured as ridges (114) framing a depression of depth (112) including a...
2018/0040526 POWER SEMICONDUCTOR MODULE
A power semiconductor module including at least one power semiconductor chip providing a power electronics switch; and a semiconductor wafer, to which the at...
2018/0040525 ELECTRONIC COMPONENT-MOUNTED BODY AND METHOD FOR MANUFACTURING SAME
An electronic component-mounted body (1) in accordance with an embodiment of the present invention is configured such that an IC chip (20) is fixed, with use...
2018/0040524 AIR CAVITY PACKAGE
A leadframe and air cavity packages formed using the leadframe are described. Using the leadframe, several air cavity packages can be quickly formed at one...
2018/0040523 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MEASURING METHOD
A semiconductor device reduces measurement time. The semiconductor device according to an embodiment of the invention includes: plural series-coupled...
2018/0040522 SEMICONDUCTOR WAFER AND METHOD OF BACKSIDE PROBE TESTING THROUGH OPENING IN FILM FRAME
A semiconductor test system has a film frame including a tape portion with one or more openings through the tape portion. The opening is disposed in a center...
2018/0040521 SEMICONDUCTOR DEVICE
A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the...
2018/0040520 SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND THERMOCOUPLE SUPPORT
A substrate processing apparatus includes: a reaction tube configured to accommodate a substrate holder holding a plurality of substrates and process a...
2018/0040519 TEST APPARATUS AND MANUFACTURING APPARATUS OF LIGHT EMITTING DEVICE PACKAGE
A test apparatus includes a lighting unit radiating light on a to-be-tested object having a light transmitting resin containing a light conversion material; a...
2018/0040518 OVEN ENCLOSURE FOR OPTICAL COMPONENTS WITH INTEGRATED PURGE GAS PRE-HEATER
A cartridge in an oven enclosure includes a pre-heating feature for an incoming purge gas before the purge gas enters the space around an optical component,...
2018/0040517 SELF-ALIGNED HARD MASK FOR EPITAXY PROTECTION
A method includes isolating a first and at least a second region on a semiconductor substrate, and forming one or more devices on each of the first and at...
2018/0040516 FINFET DEVICE AND METHOD OF MANUFACTURING
A method for producing a finFET having a fin with thinned sidewalls on a lower portion above a shallow trench isolation (STI) regions is provided. Embodiments...
2018/0040515 SEMICONDUCTOR DEVICE HAVING MULTIPLE THICKNESS OXIDES
Method for fabricating semiconductor device comprising: forming a dummy gate on a first nitrided oxide layer and a non-nitrided oxide layer; nitridizing an...
2018/0040514 SEMICONDUCTOR PACKAGES HAVING AN ELECTRIC DEVICE WITH A RECESS
Embodiments are directed to a package that includes an electric device having a recess. In one embodiment, the electric device is a sensor and the recess...
2018/0040513 PROCESSING METHOD FOR WAFER
A wafer processing method of dividing along a plurality of projected dicing lines set on the wafer includes a placing step of placing the wafer on a heating...
2018/0040512 Method for Producing a Semiconductor Body
A method for producing a semiconductor body is disclosed. In an embodiment the method includes providing a semiconductor body, applying a first mask layer and...
2018/0040511 METHODS OF FORMING A THROUGH-SUBSTRATE-VIA (TSV) AND A METALLIZATION LAYER AFTER FORMATION OF A SEMICONDUCTOR...
One illustrative method disclosed includes, among other things, forming a semiconductor device above a semiconducting substrate, forming a device level contact...
2018/0040510 SELECTIVE RECESSING TO FORM A FULLY ALIGNED VIA
A method of forming a semiconductor device having a vertical metal line interconnect (via) fully aligned to a first direction of a first interconnect layer and...
2018/0040509 BACKSIDE CONTACT TO A FINAL SUBSTRATE
A method for fabricating a backside contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer....
2018/0040508 TFT STRUCTURE AND REPAIR METHOD THEREOF, GOA CIRCUIT
The present invention provides a TFT structure and a repair method thereof, a GOA circuit. The TFT structure and the repair method thereof includes a source...
2018/0040507 STRUCTURE AND METHOD TO REDUCE COPPER LOSS DURING METAL CAP FORMATION
A copper or copper alloy is formed in a reflow enhancement layer lined opening present in an interconnect dielectric material layer. A ruthenium (Ru) or osmium...
2018/0040506 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
A semiconductor device and its manufacturing method are presented. The manufacturing method entails: forming a dielectric layer on a semiconductor substrate;...
2018/0040505 METHOD FOR FORMING A SHALLOW TRENCH ISOLATION STRUCTURE USING A NITRIDE LINER AND A DIFFUSIONLESS ANNEAL
A method includes forming a trench in a stack comprising a substrate, a buried oxide layer formed above the substrate, a semiconductor layer formed above the...
2018/0040504 Devices with Backside Metal Structures and Methods of Formation Thereof
A method of fabricating a semiconductor device includes forming trenches filled with a sacrificial material. The trenches extend into a semiconductor substrate...
2018/0040503 SUBSTRATE MOUNTING METHOD AND SUBSTRATE MOUNTING DEVICE
There is provided a substrate mounting method of brining a substrate close to a mounting table to mount the substrate on the mounting table by reducing a...
2018/0040502 APPARATUS FOR PROCESSING WAFER-SHAPED ARTICLES
An apparatus for processing wafer-shaped articles comprises a rotary chuck having a series of contact elements surrounding a wafer-shaped article when mounted...
2018/0040501 METHOD AND COMPONENT-ARRANGEMENT FOR A TRANSFER PRINT BETWEEN SUBSTRATES
The transfer of devices or device components from a carrier substrate to a further carrier substrate or to a plurality of further carrier substrates can be...
2018/0040500 CARRIER FOR TEMPORARY BONDED WAFERS
Carrier onto which a wafer can be temporarily bonded. The carrier comprises a plate shaped laminate. The plate shaped laminate comprises a first layer. The...
2018/0040499 ELECTROSTATIC CHUCK AND WAFER PROCESSING APPARATUS
According to one embodiment, an electrostatic chuck includes a ceramic dielectric substrate including a sealing ring provided at a peripheral edge portion of...
2018/0040497 SUBSTRATE FIXING DEVICE
A substrate fixing device includes a baseplate, an electrostatic chuck, and an insulating layer interposed between the baseplate and the electrostatic chuck....
2018/0040496 ELECTROSTATIC CHUCK SYSTEM AND CONTROL METHOD THEREOF
An electrostatic chuck system includes a first heater, a second heater, a chiller, and a controller. The first heater includes a plurality of resistors...
2018/0040495 SUBSTRATE HOLDER AND METHOD FOR BONDING TWO SUBSTRATES
A substrate holder having a fixing surface for holding a substrate, a system having such a substrate holder, a use of such a substrate holder, a method for...
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