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Patent # Description
2018/0061486 ULTRA-LOW-VOLTAGE CMOS CIRCUIT AND THE SAME FOR MEMORY
A memory includes a plurality of memory cells and a plurality of peripheral circuits. Each memory cell has a first inverter and a second inverter, the first...
2018/0061485 REFRESH CONTROL CIRCUIT AND MEMORY DEVICE INCLUDING SAME
A memory device may include: at least one memory bank; and a control circuit suitable for: refreshing the at least one memory bank through a first refresh...
2018/0061484 Systems and Methods for Memory Refresh Timing
In an embodiment, an integrated circuit (IC) and a memory device are configured to operate in a "normal" mode and a "self refresh" mode. The IC may generate...
2018/0061483 A TEMPERATURE-DEPENDENT REFRESH CIRCUIT CONFIGURED TO INCREASE OR DECREASE A COUNT VALUE OF A REFRESH TIMER...
Systems and apparatuses for memory devices utilizing a continuous self-refresh timer are provided. An example apparatus includes a self-refresh timer...
2018/0061482 High-density magnetic memory device
A high-density magnetic memory device includes: a heavy metal strip or an antiferromagnet strip with a thickness of 0-20 nm, and a plurality of magnetic tunnel...
2018/0061481 Memory Arrays
Some embodiments include a memory array having a series of bitlines. Each of the bitlines has a first comparative bitline component and a second comparative...
2018/0061480 SEMICONDUCTOR DEVICE
A semiconductor device includes an equalizing circuit and a control circuit. The equalizing circuit executes an operation of pre-charging the signal...
2018/0061479 SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
A semiconductor memory device may include a sense amplifier for sensing and amplifying data of a bit line pair with pull-up and pull-down driving voltages; a...
2018/0061478 DOUBLE DATA RATE COMMAND BUS
A memory subsystem includes a command address bus capable to be operated at double data rate. A memory circuit includes N command signal lines that operate at...
2018/0061477 APPARATUSES AND METHODS INCLUDING TWO TRANSISTOR-ONE CAPACITOR MEMORY AND FOR ACCESSING SAME
Apparatuses and methods are disclosed that include two transistor-one capacitor memory and for accessing such memory. An example apparatus includes a capacitor...
2018/0061476 REFRESH CONTROL CIRCUIT FOR TARGET REFRESH OPERATION OF SEMICONDUCTOR MEMORY DEVICE, AND OPERATING METHOD THEREOF
A semiconductor memory device may include: a memory cell region including a plurality of memory cells coupled between a plurality of word lines and a plurality...
2018/0061475 DEVICE HAVING MULTIPLE SWITCHING BUFFERS FOR DATA PATHS CONTROLLED BASED ON IO CONFIGURATION MODES
A device includes a first data terminal, a second data terminal, a first switching buffer coupled between a data node and the first data terminal and a second...
2018/0061474 SEMICONDUCTOR DEVICES
A semiconductor device includes a bank address generation circuit, a row/column address generation circuit, and an operation control circuit. The bank address...
2018/0061472 SEMICONDUCTOR SYSTEM
A semiconductor system may include: an external channel including a CA (Command/Address) channel, and first and second data channels; and first and second...
2018/0061471 APPARATUSES AND METHODS INCLUDING FERROELECTRIC MEMORY AND FOR ACCESSING FERROELECTRIC MEMORY
Apparatuses and methods are disclosed that include ferroelectric memory and for accessing ferroelectric memory. An example method includes increasing a voltage...
2018/0061470 FULL BIAS SENSING IN A MEMORY ARRAY
Methods, systems, and apparatuses for full bias sensing in a memory array are described. Various embodiments of an access operation of a cell in a array may be...
2018/0061469 APPARATUSES AND METHODS INCLUDING FERROELECTRIC MEMORY AND FOR OPERATING FERROELECTRIC MEMORY
Apparatuses and methods are disclosed that in ferroelectric memory and for operating ferroelectric memory. An example apparatus includes a capacitor having a...
2018/0061468 FERROELECTRIC MEMORY CELLS
Apparatuses and methods are disclosed that include ferroelectric memory cells. An example ferroelectric memory cell includes two transistors and two...
2018/0061467 HIGH SPEED, LOW POWER SPIN-ORBIT TORQUE (SOT) ASSISTED SPIN-TRANSFER TORQUE MAGNETIC RANDOM ACCESS MEMORY...
A magnetic random access memory (MRAM) array including several bit cells is described. Each of the bit cells may include a perpendicular magnetic tunnel...
2018/0061466 SEMICONDUCTOR MEMORY SYSTEM AND OPERATING METHOD THEREOF
A semiconductor memory system comprising: a memory device including a plurality of data cells; a read/write circuit suitable for performing a write operation...
2018/0061465 System and Method for Calibrating Memory Using Credit-Based Segmentation Control
A system and method for calibrating memory using credit-based segmentation control is disclosed. A memory and a memory controller coupled thereto. The memory...
2018/0061464 SEMICONDUCTOR MEMORY DEVICE AND READING METHOD THEREOF
The invention provides a semiconductor memory device and a reading method thereof, which are capable of suppressing a peak current when pre-charging a bit line...
2018/0061463 PRE-CHARGE CIRCUIT FOR PREVENTING INRUSH CURRENT AND ELECTRONIC DEVICE INCLUDING THE SAME
An electronic device includes a power connector, a power supply conductive line, and a pre-charge conductive line. The power connector includes a pre-charge...
2018/0061462 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device which is capable of high-speed operation in synchronization with external control signals is provided. The semiconductor memory...
2018/0061461 BIT LINE SENSE AMPLIFIER
A bit line sense amplifier with an enhanced sensing margin is provided. The bit line sense amplifier includes a sensing amplification circuit connected to a...
2018/0061460 Sense Amplifier Constructions
A sense amplifier construction comprises a first n-type transistor and a second n-type transistor above the first n-type transistor. A third p-type transistor...
2018/0061459 COMPUTERIZED SYSTEM AND METHOD FOR AUTOMATICALLY GENERATING HIGH-QUALITY DIGITAL CONTENT THUMBNAILS FROM...
Disclosed are systems and methods for improving interactions with and between computers in content searching, generating, hosting and/or providing systems...
2018/0061458 INTELLIGENT MEDIA SYNCHRONIZATION
Intelligent synchronization of media or other material output from multiple media devices is contemplated. The intelligence synchronization may include...
2018/0061457 SYSTEMS AND METHODS FOR DYNAMICALLY PROVIDING VIDEO CONTENT BASED ON DECLARATIVE INSTRUCTIONS
Systems, methods, and non-transitory computer-readable media can acquire a first selection to identify a subset of media content items out of a set of media...
2018/0061456 DYNAMIC IMAGE CONTENT OVERLAYING
Systems and methods for dynamic image content overlaying are disclosed. In embodiments, a computer-implemented method comprises analyzing one or more digital...
2018/0061455 COMPUTER DEVICE, METHOD, AND GRAPHICAL USER INTERFACE FOR AUTOMATING THE DIGITAL TRANSFORMATION, ENHANCEMENT,...
A computer-implemented method is described for automatically digitally transforming and editing video files to produce a finished video presentation. The...
2018/0061454 METHOD AND SYSTEM FOR 360 DEGREE VIDEO EDITING WITH LATENCY COMPENSATION
There is provided a system and method for latency compensation in a 360.degree. VR video editing system. One embodiment involves a determination of the latency...
2018/0061453 METHODS AND APPARATUS TO PERFORM SPEED-ENHANCED PLAYBACK OF RECORDED MEDIA
Methods, apparatus, systems and articles of manufacture to perform speed-enhanced playback of recorded media are disclosed. An example method includes parsing...
2018/0061452 VIBRATION COMPENSATION USING DISK LOCKED CLOCK ERROR
An apparatus includes a disk locked clock system and a feedforward microactuator compensator. The disk locked clock system is configured to estimate a timing...
2018/0061451 APPARATUS FOR MINIMIZING CROSS TRACK INTERFERENCE FOR OPTICAL TAPE
In at least one embodiment, an optical data storage tape including a plurality of tracks is provided. The plurality of tracks include a first track having a...
2018/0061450 SWITCHING PERIOD CONTROL OF MICROWAVE ASSISTED MAGNETIC RECORDING FOR POLE ERASURE SUPPRESSION
A magnetic recording system for preventing data loss resulting magnetic oscillator current. The magnetic recording system includes a magnetic write head with a...
2018/0061449 Binaural Audio-Video Recording Using Short Range Wireless Transmission from Head Worn Devices to Receptor...
A method of recording sound in a binaural manner and transmitting the sound to an electronic device using a wearable device is provided. The method includes...
2018/0061448 TAPE TRANSPORT CONTROL WITH FEEDBACK OF VELOCITY AND TENSION
A tape transport control system with enhanced regulation of tape tension and velocity over the entire length of the tape. For example, a closed-loop control...
2018/0061447 MAGNETIC TAPE
Provided is a magnetic tape including: a non-magnetic support; a magnetic layer on one surface side of the non-magnetic support; and a back coating layer on...
2018/0061446 MAGNETIC TAPE
Provided is a magnetic tape in which the total thickness of the non-magnetic layer and the magnetic layer is equal to or smaller than 0.60 .mu.m, the magnetic...
2018/0061445 FERRIMAGNETIC PARTICLE POWDER AND METHOD OF MANUFACTURING FERRIMAGNETIC PARTICLE POWDER, AS WELL AS MAGNETIC...
A magnetic recording medium includes: a substrate; and a magnetic layer including a ferrimagnetic particle powder. A product (V.times.SFD) of a particle volume...
2018/0061444 MAGNETIC DISK DEVICE AND CONTROL METHOD THEREOF
A magnetic disk device includes a magnetic disk, a head slider and a control circuit. The head slider includes a read element, a write element, a first heater...
2018/0061443 METHOD FOR CORRECTING A MOUNTING POSITION OF A DISK DEVICE ON A RACK
A method for correcting a mounting position of a disk device on a rack, includes performing a normal seek to position a head of the disk device above a target...
2018/0061442 Low Resistance Ground Joints For Dual Stage Actuation Disk Drive Suspensions
A stainless steel dual stage actuated disk drive head suspension baseplate including a plated electrical contact area having nickel and gold. The baseplate can...
2018/0061441 APPARATUS HAVING SELF-HEALING CURRENT-PERPENDICULAR-TO-PLANE READ HEAD
An apparatus according to one embodiment includes a substrate having a media bearing surface, and a first shield above the substrate. The first shield has a...
2018/0061440 POLYCRYSTALLINE DIELECTRIC COATING FOR COBALT IRON ALLOY THIN FILMS
In one general embodiment, a method includes performing a reducing operation for reducing a native oxide along a surface of a CoFe layer of a magnetic...
2018/0061439 AUTOMATIC AUDIO CAPTIONING
A method, computer readable medium, and system are disclosed for audio captioning. A raw audio waveform including a non-speech sound is received and relevant...
2018/0061438 System and Method for Predictive Generation of Visual Sequences
A system and method for predictively generating visual experiences based on streaming audio is disclosed. More specifically, the present invention is directed...
2018/0061437 TECHNIQUES FOR DECREASING ECHO AND TRANSMISSION PERIODS FOR AUDIO COMMUNICATION SESSIONS
A computer-implemented technique can include establishing an audio communication session between first and second computing devices and obtaining, by the first...
2018/0061436 AUDIO PROCESSING METHOD, AUDIO PROCESSING DEVICE, AND COMPUTER READABLE STORAGE MEDIUM
An audio processing method including: generating a plurality of frequency spectra by transforming a plurality of audio signals inputted to a plurality of input...
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