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Patent # Description
2018/0197985 HIGH VOLTAGE LDMOS TRANSISTOR AND METHODS FOR MANUFACTURING THE SAME
A semiconductor device is provided. The semiconductor device comprises a substrate, a gate, a first doped region and a second doped region. The gate is over...
2018/0197984 SEMICONDUCTOR DEVICE
A semiconductor device is provided that includes a semiconductor substrate; an insulating film that is provided on the semiconductor substrate, has an opening...
2018/0197983 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
In a first main surface side of a silicon carbide semiconductor base, a trench is formed. A second base region of a second conductivity type is arranged at a...
2018/0197982 Semiconductor Device with a Guard Structure and Corresponding Methods of Manufacture
A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the...
2018/0197981 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating semiconductor device includes the steps of: providing a substrate having a first fin-shaped structure thereon; forming a spacer...
2018/0197980 FINFET WITH MERGE-FREE FINS
A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins...
2018/0197979 SEMICONDUCTOR DEVICE, POWER SUPPLY APPARATUS AND HIGH-FREQUENCY AMPLIFIER
A semiconductor device includes a semiconductor stacked structure in which a semiconductor layer including an electron supply layer and an electron transit...
2018/0197978 SEMICONDUCTOR DEVICE
A nitride semiconductor device is disclosed. The semiconductor device includes a semiconductor stack with a top layer containing gallium (Ga) and nitrogen (N),...
2018/0197977 SEMICONDUCTOR DEVICE
A semiconductor device has a semiconductor substrate including a first conductivity-type drift layer, a second conductivity-type base layer disposed in a...
2018/0197976 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a substrate having an insulating surface; a light-transmitting first electrode provided over the substrate; a ...
2018/0197975 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A manufacturing method of a semiconductor device including a step of forming a silicon layer over a formation substrate, a step of forming a resin layer over...
2018/0197974 OXIDE SEMICONDUCTOR FILM ETCHING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
An oxide semiconductor film etching method includes the step of: preparing a substrate (1) with an oxide semiconductor formed on a surface thereof, the oxide...
2018/0197973 MANUFACTURING METHOD OF TOP GATE THIN-FILM TRANSISTOR
The present invention provides a manufacturing method of a top gate thin-film transistor, which includes forming a reducing metal layer on an oxide...
2018/0197972 METHOD TO IMPROVE RELIABILITY OF REPLACEMENT GATE DEVICE
A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k...
2018/0197971 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate; forming a dummy...
2018/0197970 Contact Plugs and Methods Forming Same
A method includes forming a transistor, which includes forming a dummy gate stack over a semiconductor region, and forming an Inter-Layer Dielectric (ILD). The...
2018/0197969 SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A method for forming a semiconductor device structure is provided. The method includes forming a metal gate electrode structure and an insulating layer over...
2018/0197968 NONVOLATILE STORAGE CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
A nonvolatile storage circuit may include a nonvolatile storage unit configured to include fuse set groups respectively including a plurality of fuse sets and...
2018/0197967 NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PLANES
A nonvolatile memory device includes bit lines arranged in a first direction over a substrate; a memory cell array disposed between the substrate and the bit...
2018/0197966 TRANSISTOR WITH AIRGAP SPACER
A microelectronic transistor may be fabricated having an airgap spacer formed as a gate sidewall spacer, such that the airgap spacer is positioned between a...
2018/0197965 LOW RESISTIVITY WRAP-AROUND CONTACTS
Low resistivity, wrap-around contact structures are provided in nanosheet devices, vertical FETs, and FinFETs. Such contact structures are obtained by...
2018/0197964 SEMICONDUCTOR DEVICE INCLUDING SGT AND METHOD FOR PRODUCING THE SAME
An SGT is formed in Si pillars. The SGT includes WSi.sub.2 layers serving as wiring alloy layers and constituted by first alloy regions that are connected to...
2018/0197963 MEMORY CELL COMPRISING NON-SELF-ALIGNED HORIZONTAL AND VERTICAL CONTROL GATES
The present disclosure relates to a memory cell comprising a vertical selection gate extending in a trench made in a substrate, a floating gate extending above...
2018/0197962 SEMICONDUCTOR DEVICE
A semiconductor device includes at least one memory cell including a first conductivity type first semiconductor region, a second conductivity type second...
2018/0197961 III-V MOSFET WITH SELF-ALIGNED DIFFUSION BARRIER
A field effect transistor is provided which includes a plurality of fins, at least a portion of a given fin including a respective source region, and a raised...
2018/0197960 TFT array substrate, manufacturing method thereof, and liquid crystal display apparatus
The present disclosure discloses a TFT array substrate, a manufacturing method thereof and a liquid crystal display apparatus. The TFT array substrate...
2018/0197959 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device (100) is provided with a thin film transistor including an oxide semiconductor layer (5), a gate electrode (3), a gate insulating layer...
2018/0197958 MEMORY CELL AND NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE
A semiconductor integrated circuit device includes first and second select gate electrodes that are sidewall-shaped along sidewalls of a memory gate structure....
2018/0197957 FIELD EFFECT TRANSISTOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
A semiconductor device, a field effect transistor, and a fin field effect transistor are provided. The semiconductor device may include a channel layer, a...
2018/0197956 OPTICAL SENSOR AND IMAGE SENSOR INCLUDING GRAPHENE QUANTUM DOTS
Provided are an optical sensor including graphene quantum dots and an image sensor including an optical sensing layer. The optical sensor may include a...
2018/0197955 SEMICONDUCTOR DEVICE WITH SILICIDED SOURCE/DRAIN REGION
A method comprises providing a semiconductor alloy layer on a semiconductor substrate, forming a gate structure on the semiconductor alloy layer, forming...
2018/0197954 Semiconductor Structures Employing Strained Material Layers with Defined Impurity Gradients and Methods for...
Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the...
2018/0197953 CO-INTEGRATION OF ELASTIC AND PLASTIC RELAXATION ON THE SAME WAFER
An n-doped field effect transistor (nFET) section of an integrated device logic region is provided. The nFET section includes a semiconductor substrate, a...
2018/0197952 JUNCTIONLESS NANOWIRE TRANSISTOR AND MANUFACTURING METHOD FOR THE SAME
A junctionless nanowire transistor and a manufacturing method for the same are disclosed. Two terminals of each of the channel nanowires disposed in the...
2018/0197951 STRUCTURE COMPRISING A 2-DIMENSIONAL MATERIAL
A semiconductor structure is provided including an electrically-conducting substrate and a layer of a two-dimensional material. The structure further includes...
2018/0197950 SEMICONDUCTOR DEVICE
A semiconductor device includes: an active layer that is located in an SOI substrate, and in which an element included in a circuit is formed; a buried...
2018/0197949 INTEGRATED MEMORY
Some embodiments include an integrated memory having an array of capacitors. The array has edges. The capacitors along the edges are edge capacitors, and the...
2018/0197948 Power Semiconductor Device with Charge Balance Design
A semiconductor body having first and second vertically spaced apart surfaces is formed. A gate trench that vertically extends from the first surface of the...
2018/0197947 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
In a first main surface of a silicon carbide semiconductor base, a trench is formed. On a first main surface side of the silicon carbide semiconductor base, an...
2018/0197946 GRATED MIM CAPACITOR TO IMPROVE CAPACITANCE
An on-chip metal-insulator-metal (MIM) capacitor with enhanced capacitance is provided by forming the MIM capacitor along sidewall surfaces and a bottom...
2018/0197945 LEAKAGE CURRENT REDUCTION IN STACKED METAL-INSULATOR-METAL CAPACITORS
Methods of forming capacitors include forming a dielectric layer on a first metal layer. The dielectric layer is oxygenated such that interstitial oxygen is...
2018/0197944 LEAKAGE CURRENT REDUCTION IN STACKED METAL-INSULATOR-METAL CAPACITORS
Capacitors and methods of forming the same include forming a dielectric layer on a first metal layer. The dielectric layer is oxygenated such that interstitial...
2018/0197943 LEAKAGE CURRENT REDUCTION IN STACKED METAL-INSULATOR-METAL CAPACITORS
Capacitors and methods of forming the same include forming a dielectric layer on a first metal layer. The dielectric layer is oxygenated such that interstitial...
2018/0197942 Methods Of Forming An Array Of Capacitors, Methods Of Forming An Array Of Memory Cells Individually Comprising...
A method of forming an array of capacitors comprises forming elevationally-extending and longitudinally-elongated capacitor electrode lines over a substrate....
2018/0197941 METAL RESISTORS HAVING VARYING RESISTIVITY
A semiconductor structure is provided that includes a first metal resistor structure located on a portion of a dielectric-containing substrate. The first metal...
2018/0197940 RESISTORS WITH CONTROLLED RESISTIVITY
The present application provides planar and stacked resistor structures that are embedded within an interconnect dielectric material in which the resistivity...
2018/0197939 RESISTORS WITH CONTROLLED RESISTIVITY
The present application provides planar and stacked resistor structures that are embedded within an interconnect dielectric material in which the resistivity...
2018/0197938 TUNABLE RESISTOR WITH CURVED RESISTOR ELEMENTS
A resistor structure is provided that contains curved resistor elements. The resistor structure is embedded within an interconnect dielectric material and the...
2018/0197936 3D RESISTOR STRUCTURE WITH CONTROLLED RESISTIVITY
The present application provides a 3D resistor structure that is embedded within an interconnect dielectric material in which the resistivity of an electrical...
2018/0197935 FLEXIBLE DISPLAY APPARATUS
A flexible display apparatus is provided, comprising a flexible substrate including a bending area, an insulating layer formed on the flexible substrate and...
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