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Patent # Description
2018/0197632 Generating a Map of a Medical Facility
A computing device retrieves patient data for a plurality of patients assigned to healthcare unit of a medical facility, and scores a mortality risk of the...
2018/0197631 CARE SUPPORT DEVICE AND METHOD FOR CARE SUPPORT
The invention relates to a care support device (100) characterized by: an image output device (102) which is designed to display symbols (201, . . . , 212;...
2018/0197630 System and Method for Providing Customized Treatment Information for Behavioral Control of Dental Patients
Disclosed is a system for providing customized treatment information for behavioral control of dental patients, comprising: a management server comprising an...
2018/0197629 SMART TRACKING OF BABY FEEDING HABITS
A solution is provided for monitoring and analyzing baby feeding habits anywhere and anytime. The baby feeding habits data, e.g., feeding times, types of...
2018/0197628 SYSTEMS, DEVICES, AND METHODS FOR EXPERIENTIAL MEDICATION DOSAGE CALCULATIONS
Systems, devices, and methods for detecting, measuring and classifying meals for an individual based on analyte measurements are described. These results and...
2018/0197627 NAVIGABLE PRESENTATION OF A VARIETY OF SOLUTIONS FOR THERAPY PLANS
The present invention includes a method for representing a plurality of pre-calculated solutions in radiation therapy that are stored in a database and...
2018/0197626 Medical Personal Data Card And System
A medical personal data card system (10) comprises a card (C) containing a person's medical information and a device (R) for accessing the information stored...
2018/0197625 System For Measuring and Tracking Health Behaviors To Implement Health Actions
A health index system comprises a processor which executes a behavior unit, an index unit, and an output unit. The behavior unit is configured to receive an...
2018/0197624 MEDICAL ASSISTANT
A wearable device can present virtual content to the wearer for many applications in a healthcare setting. The wearer may be a patient or a healthcare provider...
2018/0197623 METHOD AND APPARATUS FOR COLLECTING TEST DATA FROM USE OF A DISPOSABLE TEST KIT
A method of collecting test data from use of a disposable test kit, the method comprising the steps of: a code reader scanning a unique test identifier...
2018/0197622 SYSTEMS AND METHODS FOR FACILITATING PATIENT SELF-SELECTION
Systems and methods are provided for over the counter statin delivery to a subject. Survey results from the subject are run against a first plurality of...
2018/0197621 E-FUSE CIRCUIT
An electrical fuse (E-fuse) circuit is disclosed, which relates to a technology for processing a failed part of the E-fuse circuit. The E-fuse circuit may be...
2018/0197620 SETTING A DEFAULT READ SIGNAL BASED ON ERROR CORRECTION
The present disclosure includes apparatuses and methods related to setting a default read signal based on error correction. A number of methods can include...
2018/0197619 READ THRESHOLD ADJUSTMENT WITH FEEDBACK INFORMATION FROM ERROR RECOVERY
A storage device with a memory may optimize the setting of a read threshold or read level. A feedback mechanism may be used responsive to there being a read...
2018/0197618 SAMPLE-AND-HOLD CIRCUIT FOR AN ELECTRICAL SIGNAL
Sample-and-hold device for an electrical signal including an input module having two inputs, including a first switching block including two input switches,...
2018/0197617 ERROR CHARACTERIZATION AND MITIGATION FOR 16NM MLC NAND FLASH MEMORY UNDER TOTAL IONIZING DOSE EFFECT
A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme...
2018/0197616 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control...
2018/0197615 METHOD OF INITIALIZING AND PROGRAMING 3D NON-VOLATILE MEMORY DEVICE
A method of initializing and programming a 3D non-volatile memory device includes applying a first program voltage to a selected string selection line coupled...
2018/0197614 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
When selectively erasing one sub-block, a control circuit applies, in a first sub-block, a first voltage to bit lines and a source line, and applies a second...
2018/0197613 METHOD FOR OPERATING SINGLE-POLY NON-VOLATILE MEMORY CELL
A method for operating a NVM cell is disclosed. The NVM cell includes a select transistor and a floating gate transistor serially connected to the select...
2018/0197612 THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY
A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first...
2018/0197611 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes first and second memory cells, first and second select transistors having first ends connected to the first and second...
2018/0197610 NON-VOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF
A non-volatile memory device includes: a memory cell array including a plurality of memory cells connected to a plurality of word lines and a plurality of bit...
2018/0197609 FLASH MEMORY
In order to reduce the manufacturing cost, a flash memory includes a memory cell array formed by a plurality of memory cells arranged in a matrix shape; a...
2018/0197608 HIGH VOLTAGE SWITCH CIRCUITS OF NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES
A high voltage switch circuit of a nonvolatile memory device includes a high voltage transistor, logic, and a high voltage switch. The high voltage transistor...
2018/0197607 OVERLAPPING WRITE SCHEMES FOR CROSS-POINT NON-VOLATILE MEMORY DEVICES
A first write operation is received. The first write operation includes a SET operation. The SET operation is configured to place a cell of the non-volatile...
2018/0197606 DEVICES AND METHODS TO PROGRAM A MEMORY CELL
Subject matter disclosed herein relates to memory devices and, more particularly, to programming a memory cell.
2018/0197605 METHOD, SYSTEM AND DEVICE FOR NON-VOLATILE MEMORY DEVICE OPERATION WITH LOW POWER, HIGH SPEED AND HIGH DENSITY
Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a read operation or a particular write operation may be...
2018/0197604 GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OPERATING VOLTAGE, AND TEMPERATURE VARIATIONS
A memory array includes wordlines, local bitlines, two-terminal memory elements, global bitlines, and local-to-global bitline pass gates and gain stages. The...
2018/0197603 METHOD FOR DETERMINING A MEMORY WINDOW OF A RESISTIVE RANDOM ACCESS MEMORY
A method for determining a memory window of at least one resistive random access memory cell, the resistive random access memory cell including a high...
2018/0197602 MEMORY DEVICE HAVING RESISTANCE CHANGE MATERIAL AND OPERATING METHOD FOR THE MEMORY DEVICE
A memory device having a resistance change material and an operating method of the memory device are provided. A memory device includes a memory cell array...
2018/0197601 MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARCHITECTURE
In some embodiments, a semiconductor memory device includes an array of semiconductor memory cells arranged in rows and columns. The array includes a first...
2018/0197600 SEMICONDUCTOR DEVICE
This invention relates to a semiconductor device that reduces energy consumed to write data to a nonvolatile storing section. A write control circuit 34 stores...
2018/0197599 MEMORY DEVICE AND REFRESH METHOD THEREOF
A memory device includes a memory cell array that includes a plurality of memory cell rows, a temperature sensor that detects a temperature of the memory cell...
2018/0197598 HARD DRIVE CARRIER
In some implementations, a hard drive carrier is configured to couple and decouple a hard drive to/from a chassis (e.g., motherboard). The hard drive carrier...
2018/0197597 SEMICONDUCTOR DEVICES
A semiconductor device may be provided. The semiconductor device may include an error scrub control circuit and or an active period signal generation circuit....
2018/0197596 REDUCED TRANSPORT ENERGY IN A MEMORY SYSTEM
A memory stack comprises at least two memory components. The memory components have a first data link interface and are to transmit signals on a data link...
2018/0197595 APPARATUSES AND METHODS FOR A MEMORY DEVICE WITH DUAL COMMON DATA I/O LINES
Apparatuses are presented for a semiconductor device utilizing dual I/O line pairs. The apparatus includes a first I/O line pair coupled to a first local I/O...
2018/0197594 COINCIDENT MEMORY BANK ACCESS VIA CROSS CONNECTED SHARED BANK RESOURCES
Systems, methods, and computer programs are disclosed for providing coincident memory bank access. One embodiment is a memory device comprising a first bank, a...
2018/0197593 NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF THE SAME
A nonvolatile memory device includes memory banks and write block circuits. Each of the memory banks includes an array of memory cells. Each of the memory...
2018/0197592 RESISTANCE CHANGE TYPE MEMORY
According to one embodiment, a memory includes a bit line connected to a memory cell; and a read circuit to execute reading of data from the memory cell. The...
2018/0197591 MAGNETIC MEMORY DEVICE THAT IS PROTECTED AGAINST READING USING AN EXTERNAL MAGNETIC FIELD AND METHOD FOR...
A magnetic memory device including a plurality of magnetic units, each unit including a first and second magnetic tunnel junctions-electrically connected in...
2018/0197590 SEMICONDUCTOR DEVICE
Disclosed is a semiconductor device, including a memory cell array including a plurality of memory cells, a read circuit suitable for generating read data...
2018/0197589 METHOD AND SYSTEM FOR PROVIDING A MAGNETIC JUNCTION USABLE IN SPIN TRANSFER OR SPIN-ORBIT TORQUE APPLICATIONS...
A magnetic device and method for providing the magnetic device are described. The magnetic device includes magnetic junctions and spin-orbit interaction (SO)...
2018/0197588 PROCESSING SYSTEM AND METHOD FOR DATA STROBE SIGNAL
A processing system and method for a data strobe signal (DQS). A counter circuit counts falling edges of the DQS within a valid region of the DQS and thereby...
2018/0197587 SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
A semiconductor memory device may include a memory cell array. The semiconductor memory device may include a peripheral circuit coupled to the memory cell...
2018/0197586 WORD LINE CONTACT REGIONS FOR THREE-DIMENSIONAL NON-VOLATILE MEMORY
Apparatuses, systems, and methods are disclosed for three-dimensional non-volatile memory. A stack of word line layers includes word lines for a...
2018/0197585 CONTROL CIRCUIT FOR A LINE OF A MEMORY ARRAY
A memory circuit having: a control circuit of a line of a memory array including: a first transistor coupled between first and second nodes and controlled by a...
2018/0197584 HYBRID LPDDR4-DRAM WITH CACHED NVM AND FLASH-NAND IN MULTI-CHIP PACKAGES FOR MOBILE DEVICES
An apparatus comprises a hybrid-memory multi-chip package (MCP) including a non-volatile memory (NVM) in an NVM die; a dynamic random access memory (DRAM) in...
2018/0197583 METHODS AND APPARATUSES FOR PROVIDING A PROGRAM VOLTAGE RESPONSIVE TO A VOLTAGE DETERMINATION
Apparatuses and methods for providing a program voltage responsive to a voltage determination are described. An example apparatus includes a memory array...
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