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Patent # Description
2018/0226504 FINFET WITH SOURCE/DRAIN STRUCTURE AND METHOD OF FABRICATION THEREOF
A semiconductor device includes a substrate including a first fin element, a second fin element, and a third fin element. A first source/drain epitaxial...
2018/0226503 VERTICAL PILLAR-TYPE FIELD EFFECT TRANSISTOR AND METHOD
Disclosed is a method of forming a vertical pillar-type field effect transistor (FET). One or more semiconductor pillars are formed by epitaxial deposition in...
2018/0226502 POWER TRANSISTOR WITH TERMINAL TRENCHES IN TERMINAL RESURF REGIONS
A device includes a transistor formed on a substrate. The transistor includes an n-type drain contact layer, an n-type drain layer, an oxide layer, a p-type...
2018/0226501 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a semiconductive substrate having a top surface, a III-V compound layer covering the top surface, and a passivation layer...
2018/0226500 INSULATED-GATE BIPOLAR TRANSISTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
The present invention provides an insulated-gate bipolar transistor (IGBT) structure and a method for manufacturing the same. The structure is a planar IGBT...
2018/0226499 SEMICONDUCTOR DEVICE WITH LOW BAND-TO-BAND TUNNELING
The invention includes a semiconductor device comprising an interlevel dielectric layer over a buried insulator layer over a semiconductor substrate; a source...
2018/0226498 SEMICONDUCTOR DEVICE
A semiconductor device including a first oxide insulating layer, a barrier layer above the first oxide insulating layer, the barrier layer including an...
2018/0226497 METHOD AND STRUCTURE FOR FORMING DIELECTRIC ISOLATED FINFET WITH IMPROVED SOURCE/DRAIN EPITAXY
Described herein is a FinFET device in which epitaxial layers of semiconductor material are formed in the source/drain regions on dielectrically isolated fin...
2018/0226496 TRANSISTORS HAVING ULTRA THIN FIN PROFILES AND THEIR METHODS OF FABRICATION
A transistor having an ultra thin fin profile and its method of fabrication is described. The transistor comprises a semiconductor substrate having an...
2018/0226495 POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a power semiconductor device includes forming a drift region in a substrate, forming a trench in the drift region, forming a gate...
2018/0226494 VERTICAL TRANSISTOR FABRICATION AND DEVICES
A method of fabricating a vertical field effect transistor including forming a first recess in a substrate; epitaxially growing a first drain from the first...
2018/0226493 REPLACEMENT METAL GATE SCHEME WITH SELF-ALIGNMENT GATE FOR VERTICAL FIELD EFFECT TRANSISTORS
A method is presented for forming a semiconductor structure. The method includes forming a fin structure over a substrate, forming a dummy gate over the fin...
2018/0226492 LONG CHANNEL MOS TRANSISTORS FOR LOW LEAKAGE APPLICATIONS ON A SHORT CHANNEL CMOS CHIP
Embodiments of the invention include vertically oriented long channel transistors and methods of forming such transistors. In one embodiment, a method of...
2018/0226491 APPROACH TO BOTTOM DIELECTRIC ISOLATION FOR VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS
A vertical transport fin field effect transistor (VT FinFET), including one or more vertical fins on a surface of a substrate, an L-shaped or U-shaped spacer...
2018/0226490 FABRICATION OF MULTI-CHANNEL NANOWIRE DEVICES WITH SELF-ALIGNED INTERNAL SPACERS AND SOI FINFETS USING...
Methods of selectively nitriding surfaces of semiconductor devices are disclosed. For example, a hardmask is formed on the top portion of the fins to create...
2018/0226489 APPROACH TO BOTTOM DIELECTRIC ISOLATION FOR VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS
A vertical transport fin field effect transistor (VT FinFET), including one or more vertical fins on a surface of a substrate, an L-shaped or U-shaped spacer...
2018/0226488 MOS Devices with Mask Layers and Methods for Forming the Same
A device includes a substrate, a gate dielectric over the substrate, and a gate electrode over the gate dielectric. A drain region and a source region are...
2018/0226487 SEMICONDUCTOR DEVICE AND ELECTRICAL APPARATUS
According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, second semiconductor...
2018/0226486 PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE
A method for producing a semiconductor device includes implanting protons from a rear surface of a semiconductor substrate of a first conductivity type, and...
2018/0226485 Metal Gate Scheme for Device and Methods of Forming
Gate structures and methods of forming the gate structures are described. In some embodiments, a method includes forming source/drain regions in a substrate,...
2018/0226484 UNIFORM THRESHOLD VOLTAGE FOR NANOSHEET DEVICES
A method is presented for forming a nanosheet structure having a uniform threshold voltage (Vt). The method includes forming a conductive barrier surrounding a...
2018/0226483 DISPLAY DEVICE
A display device is disclosed. In one aspect, the device includes a substrate and a display unit disposed on the substrate and including a plurality of pixels...
2018/0226482 Metal Gate Structure
A device comprises a metal gate structure over a substrate, wherein the metal gate structure comprises a first metal sidewall, a metal bottom layer, a first...
2018/0226481 Semiconductor Device with Different Gate Trenches
A semiconductor device includes a first trench and a second trench in a first main surface of a semiconductor substrate. Each of the first and second trenches...
2018/0226480 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor layer of a first conductivity type having a main surface at which a trench is formed, a gate insulating layer...
2018/0226479 Raised Epitaxial LDD in MuGFETs and Methods for Forming the Same
Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin,...
2018/0226478 ISOLATION STRUCTURES FOR AN INTEGRATED CIRCUIT ELEMENT AND METHOD OF MAKING SAME
Techniques and mechanisms to provide insulation for a component of an integrated circuit device. In an embodiment, structures of a circuit component are formed...
2018/0226477 TUNABLE BREAKDOWN VOLTAGE RF FET DEVICES
A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an...
2018/0226476 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE
An array panel and a manufacturing method thereof, a display panel and a display device are provided. The manufacturing method includes: forming first...
2018/0226475 SEMICONDUCTOR DEVICES AND FABRICATING METHODS THEREOF
Provided are semiconductor devices and fabricating methods thereof. The semiconductor device includes a field insulating layer formed in a substrate, an...
2018/0226474 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND...
A semiconductor device according to the embodiments described herein includes a silicon carbide layer and a silicon oxide layer. The silicon oxide layer is...
2018/0226473 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided...
2018/0226472 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SAME, CRYSTAL, AND MANUFACTURING METHOD FOR SAME
A semiconductor device or a crystal that suppresses phase transition of a corundum structured oxide crystal at high temperatures is provided. According to the...
2018/0226471 Method of Manufacturing Semiconductor Devices by Using Epitaxy and Semiconductor Devices with a Lateral Structure
Epitaxy troughs are formed in a semiconductor substrate, wherein a matrix section of the semiconductor substrate laterally separates the epitaxy troughs and...
2018/0226470 METHOD OF FABRICATING BOTTOM ELECTRODE
A method of fabricating a bottom electrode includes providing a dielectric layer. An atomic layer deposition is performed to form a bottom electrode material...
2018/0226469 Capacitor Structure With An Extended Dielectric Layer And Method Of Forming A Capacitor Structure
A capacitor structure may include a lower conducting layer (e.g., poly 1 layer) and an upper conducting layer (e.g., overlying poly 2 layer), which define an...
2018/0226467 ORGANIC LIGHT EMITTING DISPLAY DEVICE
An organic light emitting display device includes a display unit including a first pixel column and a first data line connected to the first pixel column, a...
2018/0226466 ACTIVE-MATRIX DISPLAY DEVICE
An active-matrix display device includes pixels arranged in a matrix, and each of the pixels includes subpixels that are arranged along an X direction and emit...
2018/0226465 WIRING STRUCTURE, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
The embodiments of the invention provide a wiring structure, an array substrate and manufacturing method thereof, and a display panel, relate to the field of...
2018/0226464 ORGANIC LIGHT EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
An organic light emitting display (OLED) device includes an organic light emitting diode having an anode and a cathode. The organic light emitting diode is...
2018/0226463 Organic Electroluminescent Display Device and Manufacturing Method Thereof
An organic electroluminescent display device and a manufacturing method thereof are disclosed. The organic electroluminescent display device includes a...
2018/0226462 ORGANIC LIGHT EMITTING DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
The present disclosure discloses an OLED panel, including: a substrate and a driving thin film transistor, a switching thin film transistor, a storage...
2018/0226461 DISPLAY DEVICE
A display device includes a plurality of light-emitting elements aligned on a TFT substrate in a formation of a matrix. The plurality of light-emitting...
2018/0226460 ARRAY SUBSTRATE, ORGANIC LIGHT EMITTING DISPLAY PANEL AND ORGANIC LIGHT EMITTING DISPLAY DEVICE
An array substrate, an organic light emitting display panel and an organic light emitting display device are provided. The array substrate includes a base...
2018/0226459 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure relates to a display device. An exemplary embodiment of the present invention provides a display device including a substrate and an...
2018/0226458 OLED BACK PLATE AND MANUFACTURE METHOD THEREOF
The present invention provides an OLED back plate and a manufacture method thereof. In the manufacture method of the OLED back plate of the present invention,...
2018/0226457 PIXEL ARRANGEMENT STRUCTURE
The present invention provides a pixel arrangement structure, comprising a plurality of pixel units, and each pixel unit comprising a first sub pixel, a second...
2018/0226456 ORGANIC LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure discloses a manufacturing method of organic light emitting device, and the steps of the manufacturing method comprises: manufacturing a...
2018/0226455 DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
A display panel including first and second sub pixel electrodes, a first light emitting unit, first and second charge generation layers, a second light...
2018/0226454 TOUCH DISPLAY PANEL AND TOUCH DISPLAY APPARATUS
A touch display panel is provided. The touch display panel includes: a substrate; a thin-film transistor array, an organic light-emitting unit and a thin-film...
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