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Patent # Description
2018/0226403 INSULATING LAYER NEXT TO FIN STRUCTURE AND METHOD OF REMOVING FIN STRUCTURE
A method of removing a fin structure includes providing a substrate. A fin structure extends from the substrate. A mask layer is disposed on a top surface of...
2018/0226402 INTEGRATION OF VERTICAL FIELD-EFFECT TRANSISTORS AND SADDLE FIN-TYPE FIELD EFFECT TRANSISTORS
Structures for the integration of a vertical field-effect transistor and a saddle fin-type field-effect transistor into an integrated circuit, as well as...
2018/0226401 Tipless Transistors, Short-Tip Transistors, and Methods and Circuits Therefor
An integrated circuit can include a plurality of first transistors formed in a substrate and having gate lengths of less than one micron and at least one...
2018/0226400 SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor layer of a first conductivity type having a first principal surface on one side and a second principal surface...
2018/0226399 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a first electrode, first regions, second regions, an eighth semiconductor region, a ninth...
2018/0226398 SEMICONDUCTOR DEVICE
A semiconductor device includes first and second electrodes, a first semiconductor region between the first and second electrodes, a second semiconductor...
2018/0226397 SEMICONDUCTOR DEVICE AND ELECTRICAL APPARATUS
According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, second semiconductor...
2018/0226396 SERIES RESISTOR OVER DRAIN REGION IN HIGH VOLTAGE DEVICE
Some embodiments relate to an integrated circuit. The integrated circuit includes a ring-shaped drain region having an inner edge and an outer edge. A channel...
2018/0226395 Electrostatic Discharge Protection Circuit
The present application belongs to field of integrated circuit and discloses an electrostatic discharge protection circuit comprising a first N-type transistor...
2018/0226393 ELECTROSTATIC DISCHARGE PROTECTION OF AN INTEGRATED CIRCUIT CLOCK
Certain aspects of the disclosure are directed to electrostatic discharge protection of an integrated circuit clock. According to a specific example, circuitry...
2018/0226392 COMMON MODE FILTER
A common mode filter includes a filter portion and an electrostatic protection portion disposed on the filter portion. The electrostatic protection portion...
2018/0226391 THIN FILM LC COMPONENT AND MOUNTING STRUCTURE OF SAME
A thin film LC component includes a substrate that has a first surface and a second surface opposing to each other, a thin film capacitor that is formed on the...
2018/0226390 METHOD OF MANUFACTURING SUBSTRATE STRUCTURE
A method of manufacturing a substrate structure includes providing a first substrate including a first device region on a first surface, providing a second...
2018/0226389 SEMICONDUCTOR MODULE
According to one embodiment, a semiconductor module includes a first circuit component, a first connection member, and a first wire. The first circuit...
2018/0226388 MICRO LIGHT EMITTING DIODE DISPLAY PANEL AND REPAIR METHOD THEREOF
The present invention provides a micro light emitting diode display panel and a repair method thereof. The anode of the micro light emitting diode display...
2018/0226387 SEMICONDUCTOR DEVICE ASSEMBLY WITH THROUGH-PACKAGE INTERCONNECT AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer...
2018/0226386 INORGANIC LIGHT-EMITTING-DIODE DISPLAYS WITH MULTI-ILED PIXELS
An inorganic light-emitting diode (iLED) display comprises a separate, independent, and distinct display substrate having a display area. A plurality of...
2018/0226385 LIGHT-EMITTING DEVICE
A light-emitting device includes a mounting board, a first light-emitting element, a second light-emitting element and a light-reflective covering member. The...
2018/0226384 LIGHT EMITTING DEVICE AND DISPLAY DEVICE HAVING SAME
A light emitting element disclosed in an embodiment comprises: a support substrate having a plurality of pads and a black matrix layer outside the plurality of...
2018/0226383 SEMICONDUCTOR MODULE
A semiconductor module includes: a substrate having an insulating layer and a connecting portion connecting front and rear surfaces of the insulating layer; a...
2018/0226382 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a metal column that extends in a stretching direction; a polymer layer that surrounds the metal column from a direction...
2018/0226381 INTEGRATED CIRCUIT STRUCTURES WITH RECESSED CONDUCTIVE CONTACTS FOR PACKAGE ON PACKAGE
Disclosed herein are integrated circuit (IC) structures having recessed conductive contacts for package on package (PoP). For example, an IC structure may...
2018/0226380 METHOD FOR PREPARING A SEMICONDUCTOR APPARATUS
The present disclosure provides a method for preparing a semiconductor apparatus. The semiconductor apparatus includes a first semiconductor die and a second...
2018/0226379 SEMICONDUCTOR SWITCH DEVICE
A semiconductor switch device includes a semiconductor switch main body unit that has multiple semiconductor switch chips and a control unit, multiple first...
2018/0226378 Three-Layer Package-on-Package Structure and Method Forming Same
A method includes forming a first plurality of redistribution lines, forming a first metal post over and electrically connected to the first plurality of...
2018/0226377 ROBUST INTERMETALLIC COMPOUND LAYER INTERFACE FOR PACKAGE IN PACKAGE EMBEDDING
Embodiments may relate to an embedded package having a diffusion barrier layer may be placed between a copper (Cu) pad and a solder ball inside the embedded...
2018/0226376 APPARATUS AND METHOD FOR STACKING SEMICONDUCTOR DEVICES
An apparatus including components to stack semiconductor device die.
2018/0226375 BONDED STRUCTURES
A bonded structure can include a first element having a first interface feature and a second element having a second interface feature. The first interface...
2018/0226374 SEMICONDUCTOR DEVICE INCLUDING BUILT-IN CRACK-ARRESTING FILM STRUCTURE
A wafer-to-wafer semiconductor device includes a first wafer substrate having a first bonding layer formed on a first bulk substrate layer. A second wafer...
2018/0226373 Interconnect Structures and Methods of Forming Same
Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is an interconnect...
2018/0226372 PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
A package structure includes a semiconductor substrate, an under bump metallurgy layer, and at least one bump. The under bump metallurgy layer is disposed on...
2018/0226371 CONDUCTIVE BARRIER DIRECT HYBRID BONDING
A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding...
2018/0226370 Package with Solder Regions Aligned to Recesses
A method includes forming a passivation layer over a portion of a metal pad, forming a polymer layer over the passivation layer, and exposing the polymer layer...
2018/0226369 METHOD OF PATTERN PLACEMENT CORRECTION
In one embodiment of the invention, a method for correcting a pattern placement on a substrate is disclosed. The method begins by detecting three reference...
2018/0226368 METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE
A method of manufacturing a semiconductor structure includes providing a transceiver, forming a molding to surround the transceiver, forming a plurality of...
2018/0226367 FRONT END SYSTEMS AND RELATED DEVICES, INTEGRATED CIRCUITS, MODULES, AND METHODS
Front end systems and related devices, integrated circuits, modules, and methods are disclosed. One such front end system includes a low noise amplifier in a...
2018/0226366 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
A semiconductor package includes a device embedded portion including a first substrate having a first device embedded therein and a second substrate disposed...
2018/0226365 SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor package device includes a substrate, a first package body, a permeable element and a coil. The substrate includes a first surface. The first...
2018/0226364 METAL-FREE FRAME DESIGN FOR SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES
Metal-free frame designs for silicon bridges for semiconductor packages and the resulting silicon bridges and semi-conductor packages are described. In an...
2018/0226363 Warpage Control in Package-on-Package Structures
A package includes a bottom substrate and a bottom die over and bonded to the bottom substrate. A metal-particle-containing compound material is overlying a...
2018/0226362 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the...
2018/0226361 CONTROLLED STANDOFF FOR MODULE WITH BALL GRID ARRAY
Controlled standoff for module with ball grid array. In some embodiments, a packaged module can include a packaging substrate having an underside, and an...
2018/0226360 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
A semiconductor device includes a wiring, a semiconductor chip above the wiring and a metal block above the semiconductor chip. The semiconductor chip includes...
2018/0226359 MASK-INTEGRATED SURFACE PROTECTIVE TAPE
A mask-integrated surface protective tape, containing: a substrate film; a temporary-adhesive layer provided on the substrate film; and a mask material layer...
2018/0226358 SYSTEMS AND METHODS FOR ELECTROMAGNETIC INTERFERENCE SHIELDING
Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include a substrate...
2018/0226357 EMBEDDED VOLTAGE REFERENCE PLANE FOR SYSTEM-IN-PACKAGE APPLICATIONS
A semiconductor package is disclosed. The semiconductor package includes a multilayer package substrate. The layers of the multi-layer substrate include one or...
2018/0226356 SEMICONDUCTOR MODULE
A semiconductor module includes: a first substrate having a first insulating substrate and a first conductor layer; a power device part having a first...
2018/0226355 HYBRID WAFER DICING APPROACH USING A SPLIT BEAM LASER SCRIBING PROCESS AND PLASMA ETCH PROCESS
Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor...
2018/0226354 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
A semiconductor package including a marking film and a method of fabricating the same are provided wherein a marking film including a thermoreactive layer may...
2018/0226353 SEMICONDUCTOR LEAD FRAME WITH MACHINE READABLE MARK
A lead frame used in semiconductor device assembly includes first and second opposing planar surfaces. A marking area is defined on the first planar surface....
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