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Patent # Description
2018/0225238 Apparatus and Mechanism to Bypass PCIe Address Translation By Using Alternative Routing
An address space field is used in conjunction with a normal address field to allow indication of an address space for the particular address value. In one...
2018/0225237 HARDWARE-BASED VIRTUAL MACHINE COMMUNICATION
A processing system includes a processor and a VM-to-VM communication accelerator circuit comprising a first interface device to support direct memory access...
2018/0225236 MEMORY CONTROLLER, STORAGE DEVICE, INFORMATION PROCESSING SYSTEM, AND MEMORY CONTROL METHOD
High-speed data transfer is performed in a storage device having a plurality of semiconductor memories while an increase in power consumption is prevented. In...
2018/0225235 SYSTEMS AND METHODS FOR UTILIZING DDR4-DRAM CHIPS IN HYBRID DDR5-DIMMS AND FOR CASCADING DDR5-DIMMS
A hybrid DDR5 DIMM device includes a PCB board with a host interface through one of two DDR5 sub-channels, and a plurality of DDR4 or slow DDR5 SDRAM chips on...
2018/0225234 DATA STORAGE DEVICE AND OPERATING METHOD THEREOF
A data storage device includes a nonvolatile memory device; a power management unit suitable for outputting first and second low voltage detection signals,...
2018/0225233 IN-BAND RETIMER REGISTER ACCESS
Data is accessed from a particular register first device that is connected to a second device via a link that includes at least one retimer device. The...
2018/0225232 DATA PROCESSING
A memory controller comprises memory access circuitry configured to initiate a data access of data stored in a memory in response to a data access hint message...
2018/0225231 Electronic meter with a removable protective plug
An intelligent electronic device (IED), e.g., an electrical power meter, having at least one removable memory device for storing data sensed and generated by...
2018/0225230 SYSTEM AND METHOD FOR SECURELY CONNECTING TO A PERIPHERAL DEVICE
A device connectable between a host computer and a computer peripheral over a standard bus interface is disclosed, used to improve security, and to detect and...
2018/0225229 Mobile Wireless Communication System, Network and Method for Managing the Use of a Peripheral in Connection...
The present invention provides a mobile wireless communication system, network, and method for managing the use of one or more peripherals with a mobile...
2018/0225228 METHOD AND APPARATUS FOR BUS LOCK ASSISTANCE
A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution...
2018/0225227 SANITIZING MEMORY OF CLOUD SYSTEMS
A computer-implemented method sanitizes memory in a cloud environment. One or more processors in a computer receive a hypercall resulting from a call from an...
2018/0225226 BACKUP SYSTEM WITH MULTIPLE RECOVERY KEYS
Some embodiments provide, for a particular device in a set of related devices, a method for backing up data synchronized between the set of related devices....
2018/0225225 Secure Data Management
A computing device can securely and selectively enable a remote computing device to decrypt encrypted data that is stored remotely (e.g., within a ...
2018/0225223 DATA PROCESSING APPARATUS AND A METHOD OF OPERATING A DATA PROCESSING APPARATUS
The invention relates to a data processing apparatus, comprising a processor configured to execute a process, in particular with at least one thread, a memory...
2018/0225222 VM INTER-PROCESS COMMUNICATION
A method is described for enabling inter-process communication between a first application and a second application, the first application running within a...
2018/0225221 POST-COPY VM MIGRATION SPEEDUP USING FREE PAGE HINTING
A system and methods for migrating a virtual machine (VM). In one embodiment, a hypervisor receives a request to migrate the contents of a memory of a source...
2018/0225220 MEMORY DEVICE AND METHOD OF OPERATING THE SAME
A memory device and a method of operating the same. The memory device may include a memory block including a plurality of pages, and a control logic configured...
2018/0225219 CACHE BYPASS
A data processing apparatus is provided including a memory hierarchy having a plurality of cache levels including a forwarding cache level, at least one...
2018/0225218 NO-LOCALITY HINT VECTOR MEMORY ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode a no-locality hint vector memory access instruction. The...
2018/0225217 NO-LOCALITY HINT VECTOR MEMORY ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode a no-locality hint vector memory access instruction. The...
2018/0225216 DATA PROCESSING
Data processing apparatus comprises a data access requesting node; data access circuitry to receive a data access request from the data access requesting node...
2018/0225215 ACCESSING TABLES WITH HETEROGENEOUS PARTITIONS
A computer-implemented method according to one embodiment includes receiving a request for data, locating the data at one or more partitions of a...
2018/0225214 CACHE CONTENT MANAGEMENT
Apparatus and a corresponding method of operating a hub device, and a target device, in a coherent interconnect system are presented. A cache pre-population...
2018/0225213 PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is...
2018/0225212 PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is...
2018/0225211 PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is...
2018/0225210 RESPONDING TO SNOOP REQUESTS
A data processing apparatus includes receiving circuitry to receive a snoop request sent by a source node in respect of requested data and transmitting...
2018/0225209 READ-WITH OVERRIDABLE-INVALIDATE TRANSACTION
A system comprises a number of master devices and an interconnect for managing coherency between the master devices. In response to a ...
2018/0225208 INFORMATION PROCESSING DEVICE
On receiving a Store instruction from a Release side processor, a shared memory transmits a cache invalidation request to an Acquire side processor, increases...
2018/0225207 SYSTEMS AND METHODS FOR RECONSTRUCTING CACHE LOSS
Implementations of this disclosure are directed to systems, methods and media for assessing the status of data being stored in distributed, cached databases...
2018/0225206 READ TRANSACTION TRACKER LIFETIMES IN A COHERENT INTERCONNECT SYSTEM
Apparatus and a corresponding method of operating the apparatus, in a coherent interconnect system comprising a requesting master device and a data-storing...
2018/0225205 VACUUM BLENDER
A vacuum blender having a vessel, a motor base containing a motor having a motor drive shaft, a blade holder having a blade with a blade shaft for engaging the...
2018/0225204 BUFFER MANAGER
Systems, methods, apparatus and computer-readable medium are described for improving efficiency and robustness for sharing data across different users, agents,...
2018/0225203 DIADIC MEMORY OPERATIONS AND EXPANDED MEMORY FRONTEND OPERATIONS
A method of performing diadic operations in a processor is provided that includes receiving a first request packet initiating a read operation from a first...
2018/0225202 ADAPTIVE STORAGE MANAGEMENT FOR OPTIMIZING MULTI-TIER DATA STORAGE SYSTEM
Embodiments provide adaptive storage management for optimizing multi-tier data storage. A storage manager may interact with storage decision advisors. The...
2018/0225201 PRESERVING VOLATILE MEMORY ACROSS A COMPUTER SYSTEM DISRUPTION
A method for preserving volatile memory across a computer system disruption includes identifying a set of volatile memory. The set of volatile memory...
2018/0225200 OPERATING METHOD OF DATA STORAGE DEVICE
A method for operating a data storage device includes storing an erase count corresponding to a physical address, as a reference value, in response to a first...
2018/0225199 DATA STORAGE DEVICE AND OPERATING METHOD THEREOF
A data storage device includes a nonvolatile memory device; and a controller suitable for setting a termination condition of a garbage collection operation...
2018/0225198 INFORMATION PROCESSING DEVICE, NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM, AND INFORMATION PROCESSING SYSTEM
According to one embodiment, an information processing device includes a nonvolatile memory, assignment unit, and transmission unit. The assignment unit...
2018/0225197 TEST CASE GENERATION FOR UNCOVERED CODE PATHS
Embodiments of the present invention provide methods, computer program products, and systems to increase code coverage. Embodiments of the present invention...
2018/0225196 TEST CASE GENERATION FOR UNCOVERED CODE PATHS
Embodiments of the present invention provide methods, computer program products, and systems to increase code coverage. Embodiments of the present invention...
2018/0225195 SELECTIVE APPLICATION TESTING
Examples relate to selectively testing applications. In one example, a computing device may: receive, from a testing device, a current state of an application...
2018/0225194 METHOD AND SYSTEM FOR IMPLEMENTING AN AUTOMATION SOFTWARE TESTING AND PACKAGING FRAMEWORK WITH ENTITLEMENTS
The invention relates to an entitlements framework with proof of entitlement consensus. The innovative system comprises: a user interface that receives an...
2018/0225193 DEBUG SYSTEM AND SEMICONDUCTOR DEVICE
When a program counter value during execution of a target program is an execution start address or less or is larger than the execution start address and is...
2018/0225192 OBJECT ORIENTED DATA TRACKING ON CLIENT AND REMOTE SERVER
Trace information representing a program object is automatically logged on a client computing system. It is uploaded to a service computing system where it is...
2018/0225191 DYNAMIC CRASH DETECTION AND DEBUGGING ASSISTANCE
In an approach to identifying program bugs, one or more computer processor detect a first crash in a try block. The one or more computer processors determine a...
2018/0225190 METHOD OF CONTROLLING AUTOMATION OF TESTING APPLICATIONS AND A SYSTEM THEREFOR
Embodiments of the present disclosure relates to a method and a system for controlling automation of testing applications. In an embodiment, automation test...
2018/0225189 LARGE EVENT LOG REPLAY METHOD AND SYSTEM
A large event log replay method and system are provided. The large event log replay method includes counting event logs generated in a process before a next...
2018/0225188 Probabilistic Processor Monitoring
A first processing component samples and lossily accumulates statistical activity data by generating at least one data bucket by segmenting a memory window in...
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