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Patent # Description
2018/0240884 SPACER CHAMFERING GATE STACK SCHEME
A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are...
2018/0240883 AIR-GAP GATE SIDEWALL SPACER AND METHOD
Disclosed are integrated circuit (IC) structures and formation methods. In the methods, a gate with a sacrificial gate cap and a sacrificial gate sidewall...
2018/0240882 SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL STRUCTURE
According to an exemplary embodiment, a method of forming a vertical structure with at least two barrier layers is provided. The method includes the following...
2018/0240881 SEMICONDUCTOR DEVICES INCLUDING RECESSED GATE ELECTRODE PORTIONS
A semiconductor device can include a first active pattern on a substrate, the first active pattern including a plurality of first active regions that protrude...
2018/0240880 IGBT WITH IMPROVED TERMINAL AND MANUFACTURING METHOD THEREOF
A terminal structure of an insulated gate bipolar transistor (IGBT) device includes a main junction, a cutoff ring, and a plurality of terminal rings disposed...
2018/0240879 FIELD PLATE TRENCH FET AND A SEMICONDUCTOR COMPONENT
A field plate trench FET includes a substrate, a gate buried at least partly within the substrate, and a field plate disposed below the gate, both the gate and...
2018/0240878 SILICON CARBIDE/GRAPHITE COMPOSITE AND ARTICLES AND ASSEMBLIES COMPRISING SAME
A silicon carbide-graphite composite is described, including (i) interior bulk graphite material and (ii) exterior silicon carbide matrix material, wherein the...
2018/0240877 TRANSISTOR
A transistor including a buffer layer, a channel layer, a barrier layer, a superlattice structure, a gate, a source and a drain is provided. The buffer layer,...
2018/0240876 CONNECTION ARRANGEMENTS FOR INTEGRATED LATERAL DIFFUSION FIELD EFFECT TRANSISTORS
In an active layer over a semiconductor substrate, a semiconductor device has a first lateral diffusion field effect transistor (LDFET) that includes a source,...
2018/0240875 Low Resistance Source Drain Contact Formation
Techniques for forming Ga-doped source drain contacts in Ge-based transistors are provided. In one aspect, a method for forming Ga-doped source and drain...
2018/0240874 RESISTANCE REDUCTION UNDER TRANSISTOR SPACERS
Techniques are disclosed for resistance reduction under transistor spacers. In some instances, the techniques include reducing the exposure of source/drain...
2018/0240873 Techniques for VFET Top Source/Drain Epitaxy
Techniques for VFET top source and drain epitaxy are provided. In one aspect, a method of forming a VFET includes: patterning a fin to form a bottom...
2018/0240872 NANO-TUBE MOSFET TECHNOLOGY AND DEVICES
This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each...
2018/0240871 NANOSHEET TRANSISTORS WITH SHARP JUNCTIONS
A method of forming a semiconductor device and resulting structures having nanosheet transistors with sharp junctions by forming a nanosheet stack over a...
2018/0240870 LATERAL MOSFET WITH BURIED DRAIN EXTENSION LAYER
An integrated circuit containing an extended drain MOS transistor which has a drift layer, an upper RESURF layer over and contacting an upper surface of the...
2018/0240869 MODULATED SUPER JUNCTION POWER MOSFET DEVICES
A semiconductor device--e.g., a super junction power MOSFET--includes a number of columns of one type of dopant formed in a region of another type of dopant....
2018/0240868 Semiconductor Device Having a Buried Layer
A semiconductor device includes a semiconductor substrate of a first conductivity type. A first semiconductor layer of a second conductivity type is on the...
2018/0240867 SEMICONDUCTOR DEVICE
According to an embodiment, a semiconductor device includes a semiconductor layer, a first electrode, and a first insulating film. The first electrode extends...
2018/0240866 SEMICONDUCTOR DEVICE WITH LOW LIFETIME REGION
In a semiconductor device including a low lifetime region of a depth within a range on both sides sandwiching a p-n junction of a p-type semiconductor region...
2018/0240865 MULTIPLE WORK FUNCTION DEVICE USING GeOx/TiN CAP ON WORK FUNCTION SETTING METAL
A method is presented for tuning work functions of transistors. The method includes forming a work function stack over a semiconductor substrate, depositing a...
2018/0240864 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes: preparing a semiconductor substrate provided with an ohmic-contact layer, a drift layer, and a high...
2018/0240863 MULTILAYER DIELECTRIC FOR METAL-INSULATOR-METAL CAPACITOR (MIMCAP) CAPACITANCE AND LEAKAGE IMPROVEMENT
A tri-layer dielectric stack is provided for a metal-insulator-metal capacitor (MIMCAP). Also, a metal-insulator-metal capacitor (MIMCAP) is provided having...
2018/0240862 MULTILAYER DIELECTRIC FOR METAL-INSULATOR-METAL CAPACITOR (MIMCAP) CAPACITANCE AND LEAKAGE IMPROVEMENT
A tri-layer dielectric stack is provided for a metal-insulator-metal capacitor (MIMCAP). Also, a metal-insulator-metal capacitor (MIMCAP) is provided having...
2018/0240861 MULTILAYER DIELECTRIC FOR METAL-INSULATOR-METAL CAPACITOR (MIMCAP) CAPACITANCE AND LEAKAGE IMPROVEMENT
A tri-layer dielectric stack is provided for a metal-insulator-metal capacitor (MIMCAP). Also, a metal-insulator-metal capacitor (MIMCAP) is provided having...
2018/0240860 MICROSTRUCTURE MODULATION FOR 3D BONDED SEMICONDUCTOR STRUCTURE WITH AN EMBEDDED CAPACITOR
A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a...
2018/0240859 MICROSTRUCTURE MODULATION FOR 3D BONDED SEMICONDUCTOR CONTAINING AN EMBEDDED RESISTOR STRUCTURE
A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a...
2018/0240858 TUNABLE ON-CHIP NANOSHEET RESISTOR
A method of forming an integrated circuit device having a nanosheet resistor includes forming a nanosheet structure having alternating sheets of silicon and...
2018/0240857 ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
An organic light emitting display device includes: a substrate; a semiconductor on the substrate and including a switching channel of a switching transistor...
2018/0240856 DISPLAY DEVICE
A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a...
2018/0240855 Organic Light Emitting Display Device Comprising Multi-Type Thin Film Transistor and Method of Manufacturing...
An organic light emitting display device includes a driving TFT on the substrate, a switching TFT on the substrate, and an organic light emitting diode. The...
2018/0240854 ELECTRO-OPTICAL APPARATUS, MANUFACTURING METHOD FOR ELECTRO-OPTICAL APPARATUS, AND ELECTRONIC DEVICE
An electro-optical apparatus includes a first pixel and a second pixel. The first pixel and the second pixel include a reflective layer, an insulating layer, a...
2018/0240853 ORGANIC LIGHT EMITTING DISPLAY DEVICE
Disclosed is an organic light emitting display device including a dam structure disposed in a non-display area of a substrate and an alignment mark disposed...
2018/0240852 FLEXIBLE DISPLAY SCREEN AND MANUFACTURING METHOD THEREFOR
A flexible display screen and a method for manufacturing a flexible display screen are provided. The flexible display screen includes a flexible substrate, a...
2018/0240851 SILICON-BASED OLED IMAGE TRANSCEIVING DEVICE AND MANUFACTURE METHOD THEREOF
A silicon-based OLED image transceiving device includes a substrate, multiple photodiodes for sensing light, and multiple OLEDs for emitting light. The OLED...
2018/0240850 ORGANIC ELECTROLUMINESCENT DISPLAY PANEL AND DISPLAY DEVICE
The disclosure discloses an organic electroluminescent display panel and a display device. The display panel includes at least one touch sensing element...
2018/0240849 METHOD OF MANUFACTURING DISPLAY PANEL
The present disclosure discloses a method of manufacturing a display panel. The method includes: providing a first substrate, and forming a release layer on...
2018/0240848 X-RAY DETECTOR
Disclosed is a direct-conversion-type X-ray detector, including a first electrode on a substrate, a semiconductor structure including a photoconductor using a...
2018/0240847 IMAGING ELEMENT AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
The present technology relates to a back surface irradiation type imaging element having an organic photoelectric conversion film capable of preventing color...
2018/0240846 NEUROMORPHIC DEVICE INCLUDING A SYNAPSE HAVING CARBON NANO-TUBES
A neuromorphic device is provided. The neuromorphic device may include a pre-synaptic neuron; a row line extending in a row direction from the pre-synaptic...
2018/0240845 Magnetic Memory Cell Including Two-Terminal Selector Device
The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in...
2018/0240844 Selector Device Having Asymmetric Conductance for Memory Applications
The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element, which has a low resistance state and a high...
2018/0240843 PRINT SENSOR WITH GALLIUM NITRIDE LED
A papillary print sensor is provided, including a light emitting device configured to emit light radiation towards the sensor; and a matrix photodetector...
2018/0240842 PHOTON COUNTING CONE-BEAM CT APPARATUS WITH MONOLITHIC CMOS INTEGRATED PIXEL DETECTORS
CBCT including monolithic photon counting FPD for medical applications requiring real-time 3D imaging, like mammography, interventional guided procedures or...
2018/0240841 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
A semiconductor device including a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer...
2018/0240840 SOLID-STATE IMAGING APPARATUS, AND ELECTRONIC APPARATUS
The present technology relates to a solid-state imaging apparatus and an electronic apparatus that makes it possible to improve coloration and improve image...
2018/0240838 CMOS IMAGE SENSOR WITH DUAL DAMASCENE GRID DESIGN HAVING ABSORPTION ENHANCEMENT STRUCTURE
The present disclosure, in some embodiments, relates to a method of forming an image sensor integrated chip. The method may be performed by forming an image...
2018/0240837 IMAGE SENSOR AND SENSING PIXEL ARRAY FOR READING OUT CHARGE OF SENSING SIGNAL AND CHARGE OF RESET SIGNAL OF ONE...
A sensing pixel array used in an image sensor includes sensing pixel units each including a photodiode, a row reset transistor, a buffer transistor, and a...
2018/0240836 SEMICONDUCTOR ELEMENT, MANUFACTURING METHOD OF SEMICONDUCTOR ELEMENT, AND ELECTRONIC APPARATUS
The present disclosure relates to a semiconductor element, a manufacturing method of a semiconductor element, and an electronic apparatus, which enable...
2018/0240835 IMAGE SENSOR DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure provides a method of manufacturing an image sensor device. The method comprises forming a first semiconductor chip including a matrix of...
2018/0240834 SOLID-STATE IMAGE-CAPTURING ELEMENT AND ELECTRONIC DEVICE
The present disclosure relates to a solid-state image-capturing element and an electronic device capable of reducing the capacitance by using a hollow region....
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