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Patent # Description
2018/0240783 MICROSTRUCTURE MODULATION FOR METAL WAFER-WAFER BONDING
A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a...
2018/0240782 STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH DIE SUBSTRATE EXTENSIONS
Stacked semiconductor die assemblies with die substrate extensions are disclosed herein. In one embodiment, a semiconductor die assembly can include a package...
2018/0240781 Three-Dimensional Package Structure and the Method to Fabricate Thereof
The present invention discloses a three-dimensional package structure which can achieve a relatively high utilization of an internal space thereof, so that a...
2018/0240780 PACKAGE SUBSTRATE AND PACKAGE STRUCTURE USING THE SAME
A package substrate is provided. The package substrate includes a base layer having a first surface and a second surface opposite to the first surface, a...
2018/0240779 ELECTRONICS PACKAGE HAVING A MULTI-THICKNESS CONDUCTOR LAYER AND METHOD OF MANUFACTURING THEREOF
An electronics package includes an insulating substrate and electrical components coupled to a first surface of the insulating substrate. A multi-thickness...
2018/0240778 EMBEDDED MULTI-DIE INTERCONNECT BRIDGE WITH IMPROVED POWER DELIVERY
Integrated circuit packages with multiple integrated circuit dies are provided. A multichip package may include at least two integrated circuit dies that...
2018/0240777 SEMICONDUCTOR PACKAGE STRUCTURE AND SEMICONDUCTOR PROCESS
A semiconductor process includes: applying an encapsulation material on an upper surface of a first substrate to encapsulate a die and first conductive parts,...
2018/0240776 METHOD FOR MANUFACTURING SEMICONDUCTOR CHIPS
A method for manufacturing semiconductor chips (2, 3) having arranged thereon metallic shaped bodies (6), having the following steps: arranging a plurality of...
2018/0240775 ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE
An electronic device includes a substrate, an electronic element mounted on the substrate, bumps that electrically connect the substrate to the electronic...
2018/0240774 ULTRASONIC TRANSDUCER SYSTEMS INCLUDING TUNED RESONATORS, EQUIPMENT INCLUDING SUCH SYSTEMS, AND METHODS OF...
An ultrasonic transducer system is provided. The ultrasonic transducer system includes: a transducer mounting structure; a transducer, including at least one...
2018/0240773 Embedded Wire Bond Wires for Vertical Integration With Separate Surface Mount and Wire Bond Mounting Surfaces
In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only...
2018/0240772 Electronic Device By Laser-Induced Forming and Transfer of Shaped Metallic Interconnects
An electronic device made from the method of providing a donor substrate comprising an array of metallic interconnects, using a laser system to prepare the...
2018/0240771 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a semiconductor device includes (i) a step of preparing a first semiconductor chip having a first electrode pad thereon and a second...
2018/0240770 CLIP-BONDED SEMICONDUCTOR CHIP PACKAGE USING METAL BUMPS AND METHOD FOR MANUFACTURING THE PACKAGE
A clip-bonded semiconductor chip package comprises a lead frame having a pad and a lead; a semiconductor chip bonded onto the pad of the lead frame; a bonding...
2018/0240769 BONDED STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A highly reliable bonded structure having excellent thermal fatigue resistance characteristics and thermal stress relaxation characteristics is provided. The...
2018/0240768 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a...
2018/0240767 ELECTRONIC COMPONENT, TRANSPOSING COMPONENT, METHOD FOR FABRICATING THE ELECTRONIC COMPONENT, AND METHOD FOR...
An electronic component includes a circuit substrate, a connecting electrode, a micro-element, and a solder. The connecting electrode is located on the circuit...
2018/0240766 COMPOUND SEMICONDUCTOR SUBSTRATE AND POWER AMPLIFIER MODULE
A compound semiconductor substrate has a first main surface parallel to a first direction and a second direction perpendicular to the first direction, a second...
2018/0240765 PROCESS OF FORMING SEMICONDUCTOR APPARATUS MOUNTING ON SUBSTRATE
A process of forming a semiconductor apparatus is disclosed. The process includes steps of: depositing a first metal layer containing Ni in a back surface of a...
2018/0240764 Method of Forming Contact Holes in a Fan Out Package
Methods of forming packages include forming an encapsulant laterally encapsulating a die over an active surface of the die. The active surface has an...
2018/0240763 DUAL-SIDED MODULE WITH LAND-GRID ARRAY (LGA) FOOTPRINT
A packaged radio-frequency device is disclosed, including a packaging substrate configured to receive one or more components, the packaging substrate including...
2018/0240762 MICROELECTRONIC DEVICES DESIGNED WITH COMPOUND SEMICONDUCTOR DEVICES AND INTEGRATED ON AN INTER DIE FABRIC
Embodiments of the invention include a microelectronic device that includes a first silicon based substrate having compound semiconductor components. The...
2018/0240761 RESONANCE-COUPLED SIGNALING BETWEEN IC MODULES
Coupled resonators for galvanically isolated signaling between integrated circuit modules. An illustrative system embodiment includes first and second...
2018/0240760 MOUNTING COMPONENT, WIRING SUBSTRATE, ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
Disclosed is a wiring substrate including: a first wiring layer, a second wiring layer disposed on the first wiring layer interposed by an insulating film, and...
2018/0240759 INTEGRATED MODULE WITH ELECTROMAGNETIC SHIELDING
The present disclosure relates to a shielded integrated module, which includes a module substrate with a number of perimeter bond pads, at least one electronic...
2018/0240758 SEMICONDUCTOR APPARATUS AND COMPOSITE SHEET
A semiconductor apparatus 100 according to an embodiment of the present invention includes a semiconductor substrate 11 and a protective layer 20. The...
2018/0240757 EMI Shielded Integrated Circuit Packages And Methods Of Making The Same
An integrated circuit package with a plurality of embedded electromagnetic interference (EMI) shielding and methods of making the same are disclosed. The...
2018/0240756 FIDUCIAL MARK FOR CHIP BONDING
A flexible multilayer construction (100) for mounting a light emitting semiconductor device (200) (LESD), includes a flexible dielectric substrate (110) having...
2018/0240755 Cobalt Manganese Vapor Phase Deposition
Described are semiconductor devices and methods of making semiconductor devices with a barrier layer comprising cobalt and manganese nitride. Also described...
2018/0240754 NITRIDE STRUCTURE HAVING GOLD-FREE CONTACT AND METHODS FOR FORMING SUCH STRUCTURES
A semiconductor structure having a Group III-N semiconductor layer disposed on a substrate. A multi-layer, electrical contact structure in contact with the...
2018/0240753 NITRIDE STRUCTURE HAVING GOLD-FREE CONTACT AND METHODS FOR FORMING SUCH STRUCTURES
A semiconductor structure having a Group III-N semiconductor layer disposed on a substrate. A multi-layer, electrical contact structure in contact with the...
2018/0240752 BEOL VERTICAL FUSE FORMED OVER AIR GAP
A method of forming an electrical device that includes forming a first level including an array of metal lines, wherein an air gap is positioned between the...
2018/0240751 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a semiconductor chip; an encapsulant encapsulating at least portions of the semiconductor chip; and a first...
2018/0240750 MECHANISMS FOR FORMING METAL-INSULATOR-METAL (MIM) CAPACITOR STRUCTURE
A metal-insulator-metal (MIM) capacitor structure is provided. The MIM capacitor structure includes a first conductive layer formed over a substrate, and the...
2018/0240749 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The present invention provides a semiconductor device that reduces the variation of the resistance value of the conductive film. A semiconductor device...
2018/0240748 PACKAGING SUBSTRATE AND METHOD OF FABRICATING THE SAME
A packaging substrate is provided, which includes: an insulating layer; a plurality of conductive bumps formed on the insulating layer, wherein each of the...
2018/0240747 PACKAGING SUBSTRATE AND METHOD OF FABRICATING THE SAME
A packaging substrate is provided, which includes: an insulating layer; a plurality of conductive bumps formed on the insulating layer, wherein each of the...
2018/0240746 ELECTRONIC COMPONENT MOUNTING BOARD, ELECTRONIC DEVICE, AND ELECTRONIC MODULE
An electronic component mounting board reduces short-circuiting between a plurality of thick wiring conductors to improve reliability and electrical...
2018/0240745 SUBSTRATE STRUCTURE, SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A substrate structure includes a carrier, a first metal layer, a circuit layer and a dielectric layer. The carrier has a first surface and a second surface....
2018/0240744 SEMICONDUCTOR PACKAGE AND FABRICATING METHOD THEREOF
A semiconductor device structure and a method for making a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various...
2018/0240743 SUBSTRATE, SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING PROCESS
A substrate includes a first dielectric structure, a first circuit layer, a second dielectric structure and a second circuit layer. The first circuit layer is...
2018/0240742 SEMICONDUCTOR DEVICE AND METHOD OF FORMING CANTILEVERED PROTRUSION ON A SEMICONDUCTOR DIE
A semiconductor device has a first semiconductor die with a base material. A covering layer is formed over a surface of the base material. The covering layer...
2018/0240740 LEADFRAME AND INTEGRATED CIRCUIT CONNECTION ARRANGEMENT
A semiconductor package includes a leadframe having perimeter package leads and electrical connectors, a single semiconductor die having a back-side electrical...
2018/0240739 LEAD FRAME
A lead frame includes an outer frame. The outer frame includes: an upper surface; a lower surface that is opposite to the upper surface; a side surface between...
2018/0240738 ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF
An electronic package includes an electronic component, a leadframe surrounding at least one sidewall surface of the electronic component, a molding compound...
2018/0240737 CONNECTION ARRANGEMENTS FOR INTEGRATED LATERAL DIFFUSION FIELD EFFECT TRANSISTORS HAVING A BACKSIDE CONTACT
A semiconductor package includes a leadframe having an electrically conductive paddle, electrically conductive perimeter package leads, a first electrically...
2018/0240736 PACKAGE STRUCTURE
Provided is a package structure including a substrate, a metal pad, a first polymer layer, a second polymer layer, a redistribution layer (RDL), and a third...
2018/0240735 COMPLIANT PIN FIN HEAT SINK AND METHODS
A heat sink includes a plurality of layers being disposed substantially parallel with a surface of a heat source. The layers include a plurality of pin...
2018/0240734 AIR-COOLING HEAT DISSIPATION DEVICE
An air-cooling heat dissipation device is provided for removing heat from an electronic component. The air-cooling heat dissipation device includes a...
2018/0240733 AIR-COOLING HEAT DISSIPATION DEVICE
An air-cooling heat dissipation device includes a guiding carrier and a gas pump. The guiding carrier includes a pump-receiving recess, a first guiding...
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