Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2018/0240732 SEMICONDUCTOR DEVICE
A semiconductor device includes a first and a second metal layer, the second provided on a same plane as the first layer, and first second and third terminals....
2018/0240731 SEMICONDUCTOR PACKAGE HAVING DOUBLE-SIDED HEAT DISSIPATION STRUCTURE
The present disclosure relates to a semiconductor package having a double-sided heat dissipation structure, and more particularly, to a semiconductor package...
2018/0240730 SEMICONDUCTOR DEVICE WITH HEAT DISSIPATION AND METHOD OF MAKING SAME
A semiconductor device includes: a semiconductor module and a heat dissipation sheet attached to a bottom surface of the semiconductor module, the heat...
2018/0240729 SEMICONDUCTOR PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF
A method of fabricating a semiconductor package structure is provided. The structure is configured to include a base substrate, a die disposed on the base...
2018/0240728 SEMICONDUCTOR DEVICE
Provided is a semiconductor device with high reliability. In order to solve the above problems, according to the present invention, the semiconductor device...
2018/0240727 SELF-HEALING SEMICONDUCTOR TRANSISTORS
Materials and methods for improving the DC and RF performance of off-state step-stressed high electron mobility transistors (HEMTs) and devices are provided. A...
2018/0240726 SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
Semiconductor packages and methods for forming a semiconductor package are disclosed. The method includes providing a wafer having first and second major...
2018/0240725 SEMICONDUCTOR CHIP, METHOD FOR MOUNTING SEMICONDUCTOR CHIP, AND MODULE IN WHICH SEMICONDUCTOR CHIP IS PACKAGED
A semiconductor chip includes a single-crystal substrate and a metal electrode on the bottom surface of the substrate. The metal electrode has a region in...
2018/0240724 Polymer-Based-Semiconductor Structure with Cavity
A structure includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar...
2018/0240723 Methods and Apparatus for Package with Interposers
An interposer may comprise a metal layer above a substrate. A dam or a plurality of dams may be formed above the metal layer. A dam surrounds an area of a size...
2018/0240722 Hermetic Lid Seal Printing Method
A method is provided. The method includes one or more of securing a die into a cavity of a hermetic package base, providing one or more bond connections to the...
2018/0240721 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
In a manufacturing step in which a structure of target of screening is formed on a semiconductor substrate in the middle of manufacturing process before a...
2018/0240720 FACILITATION OF ORTHOTOPIC PATTERNS DURING SUBSTRATE FABRICATION
Described herein are technologies to facilitate the fabrication of substrates, such as semiconductor wafers. More particularly, technologies described herein...
2018/0240719 REMOVABLE SACRIFICIAL CONNECTIONS FOR SEMICONDUCTOR DEVICES
Methods of fabricating semiconductor devices and Radio Frequency (RF) components are provided. The method includes providing a circuit layout on a...
2018/0240718 DESIGN OF EMBEDDED SIGE EPITAXY TEST PAD
Techniques for measuring and testing a semiconductor wafer during semiconductor device fabrication include designating a test area on the top surface of the...
2018/0240717 MODULATOR AND DETECTION SYSTEM FOR ARRAY SUBSTRATE
A modulator includes a modulator body, a transparent conductive film, a power supply and a current detection assembly, the modulator body includes an internal...
2018/0240716 VERTICAL FET WITH DIFFERENT CHANNEL ORIENTATIONS FOR NFET AND PFET
A technique relates to forming a semiconductor device. A first substrate is provided adjacent to a second substrate. The first substrate has a first surface...
2018/0240715 METHODS OF FORMING VERTICAL TRANSISTOR DEVICES WITH DIFFERENT EFFECTIVE GATE LENGTHS AND THE RESULTING DEVICES
A device includes, among other things, a first vertical transistor device positioned above a semiconductor substrate. The first vertical transistor device...
2018/0240714 DUAL CHANNEL FINFETS HAVING UNIFORM FIN HEIGHTS
A method of making a semiconductor device including forming a first blanket layer on a substrate; forming a second blanket layer on the first blanket layer;...
2018/0240713 DUAL CHANNEL FINFETS HAVING UNIFORM FIN HEIGHTS
A method of making a semiconductor device including forming a first blanket layer on a substrate; forming a second blanket layer on the first blanket layer;...
2018/0240712 Method and Structure for FinFET Device
The present disclosure provides a method, which includes forming a first fin structure and a second fin structure over a substrate, which has a first trench...
2018/0240711 FINFETS AND METHODS OF FORMING FINFETS
An embodiment is a method including forming a multi-layer stack over a substrate, the multi-layer stack including alternating first layers and second layers,...
2018/0240710 SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, AND PATTERNING METHOD
A method of fabricating a semiconductor device includes forming first and second active patterns on first and second regions, respectively, of a substrate,...
2018/0240709 METHOD FOR TRANSFERRING AT LEAST ONE THIN FILM
A method for transferring at least one thin film from a first substrate to a second substrate is provided, the thin film having a first side and an opposing...
2018/0240708 PROCESSING METHOD FOR WAFER
A processing method for a wafer including a crack detection step for irradiating illumination of a wavelength transparent to wafer, picking up an image of the...
2018/0240707 SEMICONDUCTOR DEVICE WITH SIX-SIDED PROTECTED WALLS
A method of manufacturing a device with six-sided protected walls is disclosed. The method includes fabricating the plurality of devices on a wafer, forming a...
2018/0240706 Critical Dimension Control For Self-Aligned Contact Patterning
Processing methods to create self-aligned contacts are described. A conformal liner can be deposited in a feature in a substrate surface leaving a gap between...
2018/0240705 SEMICONDUCTOR MEMORY DEVICE WITH BIT LINE CONTACT STRUCTURE AND METHOD OF FORMING THE SAME
The present invention provides a method of forming a semiconductor device. First, providing a substrate, and an STI is forming in the substrate to define a...
2018/0240704 Contact Plug without Seam Hole and Methods of Forming the Same
A method includes forming a metallic layer over a Metal-Oxide-Semiconductor (MOS) device, forming reverse memory posts over the metallic layer, and etching the...
2018/0240703 MIDDLE OF THE LINE (MOL) CONTACT FORMATION METHOD AND STRUCTURE
Disclosed are a method of forming an integrated circuit (IC) structure with robust metal plugs and the resulting IC structure. In the method, openings are...
2018/0240702 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a stacked body includes a plurality of conductive layers stacked with an insulator interposed. A semiconductor body extends in the...
2018/0240701 METHOD FOR PROCESSING INTERCONNECTION STRUCTURE FOR MINIMIZING BARRIER SIDEWALL RECESS
A method for processing an interconnection structure for minimizing barrier sidewall recess, comprises the following steps: step 1, remove a metal layer (408)...
2018/0240700 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Performance of a semiconductor device is improved. In one embodiment, for example, deposition time is increased from 4.6 sec to 6.9 sec. In other words, in one...
2018/0240699 Method for Blocking a Trench Portion
An example embodiment may include a method for blocking one or more portions of one or more trenches during manufacture of a semiconductor structure. The...
2018/0240698 Semiconductor Device Having a Shallow Trench Isolation Structure and Methods of Forming The Same
A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but...
2018/0240697 PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD
Provided is a plasma processing apparatus which comprises a chamber, a stage configured to set a holding sheet and a substrate held thereon, a securing...
2018/0240696 SUBSTRATE PROCESSING APPARATUS AND METHOD FOR ASSEMBLING TUBE ASSEMBLY
In accordance with an exemplary embodiment, a substrate processing apparatus includes: a tube assembly having an inner space in which substrates are processed...
2018/0240695 SUBSTRATE TRANSFER DEVICE, SUBSTRATE TRANSFER METHOD AND RECORDING MEDIUM
A device includes a substrate holding unit 25 configured to hold a substrate and be movable in a transversal direction to transfer the substrate from one...
2018/0240694 CENTERING SUBSTRATES ON A CHUCK
An apparatus and an associated method. The apparatus includes a chuck, an array of three or more ultrasonic sensors, a ceramic ring surrounding the chuck, and...
2018/0240693 BINDING DEVICE, DISPLAY PANEL, BINDING SYSTEM AND OPERATING METHOD THEREOF
The present disclosure provides a binding device, a display panel, a binding system and an operating method thereof. The binding system includes the binding...
2018/0240692 SELECTIVE ETCH RATE MONITOR
Embodiments include a real time etch rate sensor and methods of for using a real time etch rate sensor. In an embodiment, the real time etch rate sensor...
2018/0240691 CUSTOMIZED SMART DEVICES AND TOUCHSCREEN DEVICES AND CLEANSPACE MANUFACTURING METHODS TO MAKE THEM
The present invention provides various aspects for processing multiple types of substrates within cleanspace fabricators or for processing multiple or single...
2018/0240690 PLASMA ETCHING METHOD
Disclosed herein is a plasma etching method for plasma-etching a ground surface of a wafer after the wafer with a tape attached to its lower surface is ground....
2018/0240689 LIGHT IRRADIATION TYPE HEAT TREATMENT APPARATUS AND HEAT TREATMENT METHOD
A semiconductor wafer that has a plane orientation of (100) and is made of monocrystalline silicon is warped along an axis, i.e., a diameter along a...
2018/0240688 HELIUM PLUG DESIGN TO REDUCE ARCING
A substrate support includes a baseplate, a ceramic layer arranged on the baseplate, a bond layer arranged in a first gap between the baseplate and the ceramic...
2018/0240687 SUBSTRATE CLEANING APPARATUS AND SUBSTRATE PROCESSING APPARATUS
A substrate cleaning apparatus for performing scrub cleaning of a surface of a substrate by rotating both of the substrate and a roll cleaning member while...
2018/0240686 Semiconductor Processing System Having Multiple Decoupled Plasma Sources
A semiconductor substrate processing system includes a chamber that includes a processing region and a substrate support. The system includes a top plate...
2018/0240685 SUBSTRATE PROCESSING APPARATUS
The substrate processing apparatus includes first supply piping which guides a processing liquid from a first branching portion to a first chemical liquid...
2018/0240684 SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
A gas discharge hole 74 (205) configured to discharge a gas is provided at a position outside an edge of a substrate W held by a substrate holding unit 89...
2018/0240683 Wafer Level Chip Packaging Method
A wafer level chip packaging method, comprising: 1) providing a carrier and forming a bonding layer on a surface of the carrier; 2) forming a dielectric layer...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.