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Patent # Description
2018/0308985 Method for manufacturing semiconductor device
The invention relates to a method for forming a uniform silicide film using a crystalline semiconductor film in which orientation of crystal planes is...
2018/0308984 Thin Film Transistor and Manufacturing Method Thereof, Array Substrate and Display Device
A thin film transistor and a manufacturing method thereof, an array substrate and a display device. The manufacturing method of the thin film transistor...
2018/0308983 A METHOD OF MANUFACTURING AN ARRAY SUBSTRATE AND A DISPLAY SUBSTRATE, AND A DISPLAY PANEL
The present invention provides a method of manufacturing an array substrate and a display substrate, and a display panel. The array substrate includes a glass...
2018/0308982 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain...
2018/0308981 SENSOR DEVICE
A sensor device is provided and includes a first transistor, a second transistor, a third transistor, and a photosensor. The first transistor has a first gate,...
2018/0308980 THIN FILM TRANSISTOR, METHOD FOR FABRICATING THE SAME, DISPLAY SUBSTRATE AND DISPLAY DEVICE
A TFT, a method for fabricating the same, a display substrate, and a display device are disclosed. The TFT comprises a substrate, a gate, a gate insulating...
2018/0308979 STRAINED GATE SEMICONDUCTOR DEVICE WITH DOPED INTERLAYER DIELECTRIC MATERIAL
A semiconductor device including a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially...
2018/0308978 UNDER-CHANNEL GATE TRANSISTORS
Transistors and methods of forming the same include forming a semiconductor fin from a first material on dielectric layer. Material is etched away from the...
2018/0308977 EMBEDDED SIGE PROCESS FOR MULTI-THRESHOLD PMOS TRANSISTORS
An integrated circuit and method having a first PMOS transistor with extension and pocket implants and with SiGe source and drains and having a second PMOS...
2018/0308976 FABRICATION OF A STRAINED REGION ON A SUBSTRATE
A method of forming a strained channel for a field effect transistor, including forming a sacrificial layer on a substrate, forming a channel layer on the...
2018/0308975 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
On a front surface of a semiconductor base, an n.sup.--type drift layer, a p-type base layer, an n.sup.++-type source region, and a gate trench and a contact...
2018/0308974 POWER SEMICONDUCTOR DEVICE
A power semiconductor device includes a substrate, a main body and an electrode unit. The main body includes an active portion, an edge termination portion...
2018/0308973 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided is a semiconductor device including an active region provided in a first conductivity type semiconductor layer and a termination region provided...
2018/0308972 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
At a front surface of a semiconductor base, an n.sup.--type drift layer, a p-type base layer, an n.sup.++-type source region, an n.sup.++-type source region, a...
2018/0308971 NON-CONTACT MEASUREMENT OF A STRESS IN A FILM ON A SUBSTRATE
A method for non-contact measurement of stress in a thin-film deposited on a substrate is disclosed. The method may include measuring first topography data of...
2018/0308970 FIELD-EFFECT TRANSISTOR AND PRODUCTION METHOD THEREOF, ARRAY SUBSTRATE AND PRODUCTION METHOD THEREOF, AND...
This disclosure relates to a field-effect transistor and a production method thereof, an array substrate and a production method thereof, and a display panel....
2018/0308969 VERTICAL DMOS TRANSISTOR
A transistor includes a semiconductor body; a first gate electrode formed on a first portion of the semiconductor body and a second gate electrode formed on a...
2018/0308968 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
Characteristics of a semiconductor device are improved. A semiconductor device of the present invention includes a buffer layer composed of a first nitride...
2018/0308967 NORMALLY OFF GALLIUM NITRIDE FIELD EFFECT TRANSISTORS (FET)
A heterostructure field effect transistor (HFET) gallium nitride (GaN) semiconductor power device comprises a hetero junction structure comprises a first...
2018/0308966 FIELD-EFFECT TRANSISTOR WITH OPTIMISED PERFORMANCE AND GAIN
A transistor comprises a stack of semiconductor materials including, in particular, a first sub-layer, carefully arranged and with a specific thickness,...
2018/0308965 TECHNIQUES FOR CO-INTEGRATING TRANSITION METAL DICHALCOGENIDE (TMDC)-BASED AND III-N SEMICONDUCTOR-BASED...
Techniques are disclosed for co-integrating transition metal dichalcogenide (TMDC)-based p-channel transistor devices and III-N semiconductor-based n-channel...
2018/0308964 SEMICONDUCTOR DEVICE
The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a...
2018/0308963 SEMICONDUCTOR SWITCHING ELEMENT AND METHOD OF MANUFACTURING THE SAME
A semiconductor switching element includes a first gate electrode and a second gate electrode. The first gate electrode is disposed, via a first gate...
2018/0308962 Lateral Insulated Gate Bipolar Transistor And Method Of Eliminating The Transistor Tail Current
A lateral insulated gate bipolar transistor (LIGBT) and method for eliminating the transistor tail current. The lateral insulated gate bipolar transistor...
2018/0308961 BIPOLAR TRANSISTOR
A bipolar transistor is described. In accordance with one aspect of the present invention the bipolar transistor comprises a semiconductor body including a...
2018/0308960 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device includes a channel region, a source region having a first type semiconductor and a drain region having a second type semiconductor on...
2018/0308959 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a source region having a first dopant and a drain region having a second dopant. The first dopant is different from the second...
2018/0308958 METHOD FOR MANUFACTURING ARRAY SUBSTRATE, ARRAY SUBSTRATE AND DISPLAY PANEL
A method for manufacturing an array substrate, an array substrate and a display panel are provided. The method includes forming patterns of a gate metal layer...
2018/0308957 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
An insulating film configuring an uppermost layer of a gate insulating film of a memory cell comprises a silicon oxide film and is a layer to which a metal or...
2018/0308956 Structure and Formation Method of Semiconductor Device Structure
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a...
2018/0308955 Self-Aligned Passivation of Active Regions
A method includes forming a semiconductor fin, performing a first passivation step on a top surface of the semiconductor fin using a first passivation species,...
2018/0308954 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a patterned conductive layer and an...
2018/0308953 SIDEWALL PASSIVATION FOR HEMT DEVICES
Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a...
2018/0308952 THERMALLY STABLE SALICIDE FORMATION FOR SALICIDE FIRST CONTACTS
A method for forming a salicide includes epitaxially growing source/drain (S/D) regions on a semiconductor fin wherein the S/D regions include (111) facets in...
2018/0308951 THERMALLY STABLE SALICIDE FORMATION FOR SALICIDE FIRST CONTACTS
A method for forming a salicide includes epitaxially growing source/drain (S/D) regions on a semiconductor fin wherein the S/D regions include (111) facets in...
2018/0308950 SEMICONDUCTOR DEVICE, POWER SUPPLY CIRCUIT, AND COMPUTER
A semiconductor device includes a nitride semiconductor layer, a first electrode and second electrode on the nitride semiconductor layer, a gate electrode, and...
2018/0308949 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method for fabricating a semiconductor device is provided including an opening in a gate electrode layer to form two spaced apart gate electrode layers. An...
2018/0308948 THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY APPARATUS HAVING THE SAME, AND FABRICATING METHOD THEREOF
The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate comprising a channel region, a...
2018/0308947 VERTICAL MOS TRANSISTOR AND FABRICATING METHOD THEREOF
A vertical MOS transistor includes a substrate, a metal line disposed on the substrate, a semiconductor pillar disposed on and in contact with the metal line,...
2018/0308946 METHOD FOR FORMING OHMIC CONTACTS
Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the...
2018/0308945 GATE-ALL-AROUND FIELD EFFECT TRANSISTOR HAVING MULTIPLE THRESHOLD VOLTAGES
One example of an apparatus includes a conducting channel region. The conducting channel region includes a plurality of epitaxially grown, in situ doped...
2018/0308944 SEMICONDUCTOR DEVICE AND SIDEWALL PASSIVATION AND METHOD OF MAKING
One or more semiconductor devices are provided. The semiconductor device comprises a gate body, a conductive prelayer over the gate body, at least one...
2018/0308943 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a first electrode, a first semiconductor layer on the first electrode, a second semiconductor layer on the first semiconductor...
2018/0308942 MANUFACTURING METHOD OF ELECTRODE LAYER OF TFT SUBSTRATE AND MANUFACTURING METHOD OF FLEXIBLE TFT SUBSTRATE
The present invention provides a manufacturing method of an electrode layer of a TFT substrate and a manufacturing method of a flexible TFT substrate. The...
2018/0308941 TWO-DIMENSIONAL ELECTRONIC DEVICES AND RELATED FABRICATION METHODS
Various embodiments of a semiconductor device and related fabrication methods are disclosed. In one exemplary embodiment, the semiconductor device may include...
2018/0308940 SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR LAYER
According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al...
2018/0308939 SILICON CARBIDE SEMICONDUCTOR DEVICE
In an edge termination region, first to third electric field mitigating layers are provided in a concentric shape surrounding an active region. Between...
2018/0308938 SiC Semiconductor Device with Offset in Trench Bottom
A semiconductor device includes a trench extending from a first surface into a SiC semiconductor body. The trench has a first sidewall, a second sidewall...
2018/0308937 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
Provided is a MOS gate using a thermally oxidized film as a gate insulating film on the front surface of a silicon carbide substrate. A ratio of an excess...
2018/0308936 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE,...
A semiconductor device according to an embodiment includes a first electrode; a second electrode; a gate electrode; an n-type first silicon carbide region...
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