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Patent # Description
2019/0172529 High Density Split-Gate Memory Cell
A method of forming a memory device that includes forming on a substrate, a first insulation layer, a first conductive layer, a second insulation layer, a...
2019/0172528 SEMICONDUCTOR DEVICE
A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time,...
2019/0172527 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
There is provided a semiconductor integrated circuit device that can generate a unique ID with the suppression of overhead. When a unique ID is generated, the...
2019/0172526 SRAM MEMORY HAVING A FAST CLEAR
Static random access memory device comprising a memory matrix provided with at least one column (COL.sub.1) formed from a plurality of SRAM memory cells...
2019/0172525 MEMORY WITH EXPANDABLE ROW WIDTH
A method for operating a memory device includes initiating an access operation to a corresponding row of an array of bit cells of the memory device. Responsive...
2019/0172524 SEMICONDUCTOR DEVICE
A semiconductor device includes a first mode and a second mode different from the first mode, includes a memory circuit including a first switch, a memory...
2019/0172523 DUAL RAIL DEVICE WITH POWER DETECTOR
A dual rail device includes a first power domain circuit coupled to a first power supply through a first header control switch and a second power domain...
2019/0172522 SRAM Configuration Cell for Low-Power Field Programmable Gate Arrays
A random-access memory cell includes first and second voltage supply nodes, first and second complementary output nodes, first and second complementary bit...
2019/0172521 APPARATUSES AND METHODS FOR DETECTION REFRESH STARVATION OF A MEMORY
Apparatuses and methods for detecting refresh starvation at a memory. An example apparatus, may include a plurality of memory cells, and a control circuit...
2019/0172520 Apparatuses Having Compensator Lines Along Wordlines and Independently Controlled Relative to the Wordlines
Some embodiments include an apparatus which has a wordline coupled with a transistor gate, and which has a compensator line extending along the wordline and...
2019/0172519 APPARATUSES AND METHODS FOR CONFIGURABLE COMMAND AND DATA INPUT CIRCUITS FOR SEMICONDUCTOR MEMORIES
Apparatuses and methods for configurable command and data input circuits for semiconductor memories are described. Example apparatuses include input signal...
2019/0172518 SYSTEMS AND METHODS FOR PLATE VOLTAGE REGULATION DURING MEMORY ARRAY ACCESS
A memory device may include a memory array comprising at least two sections. Each of the sections may further include multiple memory cells. The memory device...
2019/0172517 Memory Arrays, and Methods of Forming Memory Arrays
Some embodiments include an assembly having active material structures arranged in an array having rows and columns. Each of the active material structures has...
2019/0172516 ELECTRONIC DEVICE PERFORMING TRAINING ON MEMORY DEVICE BY RANK UNIT AND TRAINING METHOD THEREOF
An electronic device includes a memory device including first and second ranks, and a system-on-chip that exchanges data with the memory device. The...
2019/0172515 PERIPHERY FILL AND LOCALIZED CAPACITANCE
Methods, systems, and devices for periphery fill and localized capacitance are described. A memory array may be fabricated with certain containers connected to...
2019/0172514 LOW POWER SENSE AMPLIFIER BASED ON PHASE TRANSITION MATERIAL
A sense amplifier utilizes a phase transition material (PTM) in conjunction with CMOS circuits to provide a precise sensing threshold. The sense amplifier can...
2019/0172512 METHODS OF OPERATING SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR MEMORY DEVICES
A method of operating a semiconductor memory device including a plurality of pins configured to transfer data and signals from/to an outside of the ...
2019/0172511 CLOCKED COMMANDS TIMING ADJUSTMENTS METHOD IN SYNCHRONOUS SEMICONDUCTOR INTEGRATED CIRCUITS
A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the...
2019/0172510 METHOD OF TRAINING DRIVE STRENGTH, ODT OF MEMORY DEVICE, COMPUTING SYSTEM PERFORMING THE SAME AND...
In a method of training for a memory device, an initialization operation is performed on the memory device when the memory device is powered on. A training...
2019/0172509 MEMORY SYSTEMS AND DEVICES THAT SUPPORT CLOCK-TO-CLOCK ALIGNMENT, TRAINING AND METHODS OF OPERATING SAME
A memory device performs first training including a plurality of loop operations to align a main clock signal and a data clock signal, which are received from...
2019/0172508 TWO-STEP DATA-LINE PRECHARGE SCHEME
Apparatus and methods are disclosed, including an apparatus having a first transistor configured to be coupled to a first bit line, and a control circuit...
2019/0172507 APPARATUSES AND METHODS FOR PROVIDING BIAS SIGNALS IN A SEMICONDUCTOR DEVICE
Apparatuses and methods for providing bias signals in a semiconductor device are described. As example apparatus includes a power supply line configured to...
2019/0172506 METHODS AND APPARATUSES FOR COMPENSATING FOR SOURCE VOLTAGE
Apparatuses and methods for compensating for source voltage are described. An example apparatus includes a source coupled to a memory cell and a read-write...
2019/0172505 APPARATUSES AND METHODS FOR PROVIDING BIAS SIGNALS ACCORDING TO OPERATION MODES AS SUPPLY VOLTAGES VARY IN A...
Apparatuses and methods for providing bias signals in a semiconductor device are described. An example apparatus includes a power supply configured to provide...
2019/0172504 PROGRAMMABLE TEMPERATURE COEFFICIENT ANALOG SECOND-ORDER CURVATURE COMPENSATED VOLTAGE REFERENCE
An example voltage reference circuit includes: a reference circuit comprising a first circuit configured to generate a proportional-to-temperature current and...
2019/0172503 DRIVING CIRCUIT, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND CONTROL METHOD OF THE DRIVING CIRCUIT
According to an embodiment, a word line driver includes: a first inverter that is driven by a first power supply voltage and inverts and outputs a decode...
2019/0172502 MEMORY DEVICES
A memory device includes a first cell block on a substrate at a first level, and a second cell block on the substrate at a second level different from the...
2019/0172501 MEMORY DEVICE WITH STRAP CELLS
A device includes a memory array. The memory array includes a first sub-bank, a second sub-bank, a strap cell and a continuous data line. The strap cell is...
2019/0172500 SYNCHRONIZED ASSET TRAYS
A method including the steps of: providing a computer readable non-transitory storage medium including a computer readable code configured to run on a local...
2019/0172499 RECORDING USER ACTIVITY ON A COMPUTER
The present disclosure relates to a method for recording user activity on a computer. The method includes creating a video file for a video sequence of a user...
2019/0172498 SYSTEMS AND METHODS FOR DETERMINING PLAYBACK POINTS IN MEDIA ASSETS
Systems and methods are described for determining playback points in media assets based on both a keyword and a context of a current playback point in a media...
2019/0172497 VIDEO ENHANCEMENT
Methods, systems, and computer program products for generating revised videos. The method includes, for example, receiving, by one or more processor, first...
2019/0172496 Methods and Systems for Customizing Virtual Reality Data
An exemplary virtual reality system accesses metadata describing a plurality of frame sequences that each include two-dimensional color data frames and depth...
2019/0172495 AGGREGATION OF RELATED MEDIA CONTENT
Systems and methods for media aggregation are disclosed herein. The system includes a media system that can transform media items into one aggregated media...
2019/0172494 REFERENCE AND NON-REFERENCE VIDEO QUALITY EVALUATION
Devices and methods for determining image quality using full-reference and non-reference techniques. Full reference image quality may be determined prior to...
2019/0172493 GENERATING VIDEO-NOTES FROM VIDEOS USING MACHINE LEARNING
A method, system and computer readable media are provided to generate short video notes (v-notes) from one or more videos. A series of inputs including...
2019/0172492 IN-BAND DATA RECOGNITION AND SYNCHRONIZATION SYSTEM
A method and apparatus for recognizing and synchronizing to in-band data at a multimedia device is provided. A content stream includes in-band data. The...
2019/0172491 Error Correction For Storage Devices
A method for performing error recovery for data stored on a track of a storage device, in which the method includes: receiving a request to read the data from...
2019/0172490 FRAGMENTED DATA STORAGE BANDS
An implementation of a system disclosed herein provides a method for managing data streams of sequential nature, wherein the method provides for determining...
2019/0172489 SIGNAL QUALITY EVALUATION DEVICE, SIGNAL QUALITY EVALUATION VALUE GENERATION METHOD, AND REPRODUCTION DEVICE
To obtain a signal quality evaluation value capable of having a high correlation to an error rate and high accuracy for a reproduction signal of high density...
2019/0172488 AUTOMATED DATA STORAGE LIBRARY DRONE ACCESSOR
A data storage system that moves and transfers components utilizing drones is disclosed. The data storage system comprises a data storage library for reading...
2019/0172487 ALUMINUM ALLOY PLATE FOR MAGNETIC DISC SUBSTRATE, METHOD FOR PRODUCING THE SAME, AND MAGNETIC DISC
An aluminum alloy plate for a magnetic disc substrate according to the present disclosure includes, in mass %, Mg: 3.0 to 8.0%, Cu: 0.002 to 0.150%, Zn: 0.05...
2019/0172486 UNDERLAYER FOR PERPENDICULARLY MAGNETIZED FILM, PERPENDICULARLY MAGNETIZED FILM STRUCTURE, PERPENDICULAR MTJ...
Disclosed is a perpendicularly magnetized film structure using a highly heat resistant underlayer film on which a cubic or tetragonal perpendicularly...
2019/0172485 MAGNETIC TUNNEL JUNCTIONS SUITABLE FOR HIGH TEMPERATURE THERMAL PROCESSING
Embodiments herein provide methods of forming a magnetic tunnel junction structure. The method includes forming a film stack that includes: a buffer layer; a...
2019/0172484 SEGMENTED MAGNETIC RECORDING WRITE HEAD FOR WRITING TIMING-BASED SERVO PATTERNS
An apparatus according to one embodiment includes a plurality of first modules each having a first write transducer. The apparatus further includes a plurality...
2019/0172483 TAPE HEAD HAVING A PORTION OF A BEARING SURFACE SLOT THAT DEFINES A SKIVING EDGE
A method according to one embodiment includes forming a bearing surface slot in an end of a section of a thin film wafer at a location that defines a tape...
2019/0172482 WRITE COIL COOLING ARRANGEMENT AT AIR BEARING SURFACE
A slider comprises an air bearing surface (ABS) and is configured to interact with a magnetic recording medium. A writer is provided on the slider and...
2019/0172481 PITCH DETECTION ALGORITHM BASED ON PWVT OF TEAGER ENERGY OPERATOR
A pitch detection method. Such a pitch detection method may use a Teager Energy Operator (TEO) with a Pseudo Weigner Ville Transformation (PWVT) to recover...
2019/0172480 VOICE ACTIVITY DETECTION SYSTEMS AND METHODS
An audio processing device or method includes an audio transducer operable to receive audio input and generate an audio signal based on the audio input. The...
2019/0172479 DEVICES AND METHODS FOR EVALUATING SPEECH QUALITY
The disclosure relates to an apparatus for determining a quality score (MOS) for an audio signal sample, the apparatus comprising: an extractor configured to...
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